lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20231006045317.1056625-5-quic_devipriy@quicinc.com>
Date:   Fri, 6 Oct 2023 10:23:17 +0530
From:   Devi Priya <quic_devipriy@...cinc.com>
To:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <lee@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
        <thierry.reding@...il.com>, <baruch@...s.co.il>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <u.kleine-koenig@...gutronix.de>,
        <linux-pwm@...r.kernel.org>
Subject: [PATCH 4/4] arm64: dts: qcom: ipq5332: Add pwm support

Add PWM support in ipq5332. The PWM is in the TCSR area. Make tcsr
"simple-mfd" compatible, and add pwm as a child of &tcsr.

Signed-off-by: Devi Priya <quic_devipriy@...cinc.com>
---
 arch/arm64/boot/dts/qcom/ipq5332.dtsi | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index d3fef2f80a81..7620f1ccd324 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -210,8 +210,21 @@ tcsr_mutex: hwlock@...5000 {
 		};
 
 		tcsr: syscon@...7000 {
-			compatible = "qcom,tcsr-ipq5332", "syscon";
+			compatible = "qcom,tcsr-ipq5332", "syscon", "simple-mfd";
 			reg = <0x01937000 0x21000>;
+			ranges = <0x0 0x01937000 0x21000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			pwm: pwm@...0 {
+				compatible = "qcom,ipq5332-pwm", "qcom,ipq6018-pwm";
+				reg = <0xa010 0x20>;
+				clocks = <&gcc GCC_ADSS_PWM_CLK>;
+				assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
+				assigned-clock-rates = <100000000>;
+				#pwm-cells = <2>;
+				status = "disabled";
+			};
 		};
 
 		sdhc: mmc@...4000 {
-- 
2.34.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ