lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <652056c5.5d0a0220.2b60d.c5dc@mx.google.com>
Date:   Fri, 6 Oct 2023 20:49:41 +0200
From:   Christian Marangi <ansuelsmth@...il.com>
To:     Eric Dumazet <edumazet@...gle.com>
Cc:     Jason Gunthorpe <jgg@...pe.ca>, Leon Romanovsky <leon@...nel.org>,
        Wolfgang Grandegger <wg@...ndegger.com>,
        Marc Kleine-Budde <mkl@...gutronix.de>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Chris Snook <chris.snook@...il.com>,
        Raju Rangoju <rajur@...lsio.com>,
        Jeroen de Borst <jeroendb@...gle.com>,
        Praveen Kaligineedi <pkaligineedi@...gle.com>,
        Shailend Chand <shailend@...gle.com>,
        Douglas Miller <dougmill@...ux.ibm.com>,
        Michael Ellerman <mpe@...erman.id.au>,
        Nicholas Piggin <npiggin@...il.com>,
        Christophe Leroy <christophe.leroy@...roup.eu>,
        Nick Child <nnac123@...ux.ibm.com>,
        Haren Myneni <haren@...ux.ibm.com>,
        Rick Lindsley <ricklind@...ux.ibm.com>,
        Dany Madden <danymadden@...ibm.com>,
        Thomas Falcon <tlfalcon@...ux.ibm.com>,
        Tariq Toukan <tariqt@...dia.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Jose Abreu <joabreu@...opsys.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Krzysztof Halasa <khalasa@...p.pl>,
        Kalle Valo <kvalo@...nel.org>,
        Jeff Johnson <quic_jjohnson@...cinc.com>,
        Gregory Greenman <gregory.greenman@...el.com>,
        Chandrashekar Devegowda <chandrashekar.devegowda@...el.com>,
        Intel Corporation <linuxwwan@...el.com>,
        Chiranjeevi Rapolu <chiranjeevi.rapolu@...ux.intel.com>,
        Liu Haijun <haijun.liu@...iatek.com>,
        M Chetan Kumar <m.chetan.kumar@...ux.intel.com>,
        Ricardo Martinez <ricardo.martinez@...ux.intel.com>,
        Loic Poulain <loic.poulain@...aro.org>,
        Sergey Ryazanov <ryazanov.s.a@...il.com>,
        Johannes Berg <johannes@...solutions.net>,
        Yuanjun Gong <ruc_gongyuanjun@....com>,
        Simon Horman <horms@...nel.org>, Rob Herring <robh@...nel.org>,
        Ziwei Xiao <ziweixiao@...gle.com>,
        Rushil Gupta <rushilg@...gle.com>,
        Coco Li <lixiaoyan@...gle.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Junfeng Guo <junfeng.guo@...el.com>,
        Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>, Wei Fang <wei.fang@....com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Yuri Karpov <YKarpov@...ras.ru>,
        Zhengchao Shao <shaozhengchao@...wei.com>,
        Andrew Lunn <andrew@...n.ch>,
        Zheng Zengkai <zhengzengkai@...wei.com>,
        Lee Jones <lee@...nel.org>,
        Maximilian Luz <luzmaximilian@...il.com>,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
        Dawei Li <set_pte_at@...look.com>,
        Anjaneyulu <pagadala.yesu.anjaneyulu@...el.com>,
        Benjamin Berg <benjamin.berg@...el.com>,
        linux-rdma@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-can@...r.kernel.org, netdev@...r.kernel.org,
        linuxppc-dev@...ts.ozlabs.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, ath10k@...ts.infradead.org,
        linux-wireless@...r.kernel.org
Subject: Re: [net-next PATCH v2 4/4] netdev: use napi_schedule bool instead
 of napi_schedule_prep/__napi_schedule

On Thu, Oct 05, 2023 at 06:16:26PM +0200, Eric Dumazet wrote:
> On Tue, Oct 3, 2023 at 8:36 PM Christian Marangi <ansuelsmth@...il.com> wrote:
> >
> > Replace if condition of napi_schedule_prep/__napi_schedule and use bool
> > from napi_schedule directly where possible.
> >
> > Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> > ---
> >  drivers/net/ethernet/atheros/atlx/atl1.c     | 4 +---
> >  drivers/net/ethernet/toshiba/tc35815.c       | 4 +---
> >  drivers/net/wireless/intel/iwlwifi/pcie/rx.c | 4 +---
> >  3 files changed, 3 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/atheros/atlx/atl1.c b/drivers/net/ethernet/atheros/atlx/atl1.c
> > index 02aa6fd8ebc2..a9014d7932db 100644
> > --- a/drivers/net/ethernet/atheros/atlx/atl1.c
> > +++ b/drivers/net/ethernet/atheros/atlx/atl1.c
> > @@ -2446,7 +2446,7 @@ static int atl1_rings_clean(struct napi_struct *napi, int budget)
> >
> >  static inline int atl1_sched_rings_clean(struct atl1_adapter* adapter)
> >  {
> > -       if (!napi_schedule_prep(&adapter->napi))
> > +       if (!napi_schedule(&adapter->napi))
> >                 /* It is possible in case even the RX/TX ints are disabled via IMR
> >                  * register the ISR bits are set anyway (but do not produce IRQ).
> >                  * To handle such situation the napi functions used to check is
> > @@ -2454,8 +2454,6 @@ static inline int atl1_sched_rings_clean(struct atl1_adapter* adapter)
> >                  */
> >                 return 0;
> >
> > -       __napi_schedule(&adapter->napi);
> > -
> >         /*
> >          * Disable RX/TX ints via IMR register if it is
> >          * allowed. NAPI handler must reenable them in same
> > diff --git a/drivers/net/ethernet/toshiba/tc35815.c b/drivers/net/ethernet/toshiba/tc35815.c
> > index 14cf6ecf6d0d..a8b8a0e13f9a 100644
> > --- a/drivers/net/ethernet/toshiba/tc35815.c
> > +++ b/drivers/net/ethernet/toshiba/tc35815.c
> > @@ -1436,9 +1436,7 @@ static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
> >         if (!(dmactl & DMA_IntMask)) {
> >                 /* disable interrupts */
> >                 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
> > -               if (napi_schedule_prep(&lp->napi))
> > -                       __napi_schedule(&lp->napi);
> > -               else {
> > +               if (!napi_schedule(&lp->napi)) {
> >                         printk(KERN_ERR "%s: interrupt taken in poll\n",
> >                                dev->name);
> >                         BUG();
> 
> Hmmm... could you also remove this BUG() ? I think this code path can be taken
> if some applications are using busy polling.
> 
> Or simply rewrite this with the traditional
> 
> if (napi_schedule_prep(&lp->napi)) {
>    /* disable interrupts */
>    tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
>     __napi_schedule(&lp->napi);
> }
> 
>

Mhhh is it safe to do so? I mean it seems very wrong to print a warning
and BUG() instead of disabling the interrupt only if napi can be
scheduled... Maybe is very old code? The more I see this the more I see
problem... (randomly disabling the interrupt and then make the kernel
die)

> 
> > diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/rx.c b/drivers/net/wireless/intel/iwlwifi/pcie/rx.c
> > index 23b5a0adcbd6..146bc7bd14fb 100644
> > --- a/drivers/net/wireless/intel/iwlwifi/pcie/rx.c
> > +++ b/drivers/net/wireless/intel/iwlwifi/pcie/rx.c
> > @@ -1660,9 +1660,7 @@ irqreturn_t iwl_pcie_irq_rx_msix_handler(int irq, void *dev_id)
> >         IWL_DEBUG_ISR(trans, "[%d] Got interrupt\n", entry->entry);
> >
> >         local_bh_disable();
> > -       if (napi_schedule_prep(&rxq->napi))
> > -               __napi_schedule(&rxq->napi);
> > -       else
> > +       if (!napi_schedule(&rxq->napi))
> >                 iwl_pcie_clear_irq(trans, entry->entry);
> 
> Same remark here about twisted logic.
> 

Ehhh here we need to be careful... We can do the usual prep/__schedule
with the DMA disable in between...

>From the comments of iwl_pcie_clear_irq.

	/*
	 * Before sending the interrupt the HW disables it to prevent
	 * a nested interrupt. This is done by writing 1 to the corresponding
	 * bit in the mask register. After handling the interrupt, it should be
	 * re-enabled by clearing this bit. This register is defined as
	 * write 1 clear (W1C) register, meaning that it's being clear
	 * by writing 1 to the bit.
	 */

So the device disable the interrupt after being fired and the bit needs
to set again for the interrupt to be reenabled. So the function
correctly reenable the irq if a napi can't be scheduled... Think there
isn't another way to handle this.

> >         local_bh_enable();
> >
> > --
> > 2.40.1
> >

-- 
	Ansuel

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ