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Message-Id: <20231008085456.71646-1-qiuxu.zhuo@intel.com>
Date:   Sun,  8 Oct 2023 16:54:56 +0800
From:   Qiuxu Zhuo <qiuxu.zhuo@...el.com>
To:     tglx@...utronix.de
Cc:     arjan@...ux.intel.com, bp@...en8.de, chang.seok.bae@...el.com,
        linux-kernel@...r.kernel.org, nik.borisov@...e.com, x86@...nel.org,
        qiuxu.zhuo@...el.com
Subject: Re: [patch V4 00/30] x86/microcode: Cleanup and late loading enhancements

Hi Thomas,

> ...
>
> The series is also available from git:
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git ucode-v4
> ...

Test Result (same as ucode-v3)
------------------------------
Tested 'ucode-v4' on an Intel Sapphire Rapids server that both early load
and late load worked well. For more details, please refer to the test below:


Tested Machine
--------------
  Intel Sapphire Rapids server with 2 sockets, each containing 48 cores,
  resulting in a total of 192 threads.


Microcodes
----------
  a) Microcode revisison of CPU                        : 0xab000130
  b) Microcode revision in the initramfs               : 0xab000140 // for early load
  c) Microcode revision in /lib/firmware/intel-ucode/* : 0xab000160 // for late load

     [ Microcode b) & c) headers both contain minirev 0x2b0000a1. ]


Dmesg log
---------
// Early load OK.
[    0.000000] microcode: updated early: 0xab000130 -> 0xab000140, date = 2022-11-04

...
[   20.215653] microcode: Microcode Update Driver: v2.2.
...

// Late load OK.
[   27.596822] microcode: Updated to revision 0xab000160, date = 2022-11-16
[   27.606848] microcode: load: updated on 96 primary CPUs with 96 siblings
[   27.614789] microcode: revision: 0xab000140 -> 0xab000160

Thanks!
-Qiuxu

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