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Message-Id: <20231009190538.2488792-2-srinivas.pandruvada@linux.intel.com>
Date: Mon, 9 Oct 2023 12:05:32 -0700
From: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
To: daniel.lezcano@...aro.org, rafael@...nel.org, rui.zhang@...el.com
Cc: linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Subject: [PATCH v2 1/7] thermal: int340x: processor_thermal: Move interrupt status MMIO offset to common header
Move define SOC_WT_RES_INT_STATUS_OFFSET to processor_thermal_device.h.
This way it can be reused in other modules.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
---
v2:
- New patch in the series
.../thermal/intel/int340x_thermal/processor_thermal_device.h | 2 ++
.../thermal/intel/int340x_thermal/processor_thermal_wt_hint.c | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
index dd025c8c2bac..8ed6e8e94c8a 100644
--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
+++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
@@ -91,6 +91,8 @@ void proc_thermal_wt_req_remove(struct pci_dev *pdev);
#define MBOX_DATA_BIT_AC_DC 30
#define MBOX_DATA_BIT_VALID 31
+#define SOC_WT_RES_INT_STATUS_OFFSET 0x5B18
+
int processor_thermal_send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp);
int processor_thermal_send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data);
int processor_thermal_mbox_interrupt_config(struct pci_dev *pdev, bool enable, int enable_bit,
diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c
index fabd8a363abb..c08838eb10c8 100644
--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c
+++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c
@@ -32,7 +32,6 @@
#include <linux/pci.h>
#include "processor_thermal_device.h"
-#define SOC_WT_RES_INT_STATUS_OFFSET 0x5B18
#define SOC_WT GENMASK_ULL(47, 40)
#define SOC_WT_PREDICTION_INT_ENABLE_BIT 23
--
2.40.1
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