linux-kernel - Re: [PATCH v7 0/19] Refactoring Microchip PCIe driver and add StarFive PCIe

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Date:   Mon, 9 Oct 2023 12:16:27 +0100
From:   Conor Dooley <conor.dooley@...rochip.com>
To:     Minda Chen <minda.chen@...rfivetech.com>
CC:     Daire McNamara <daire.mcnamara@...rochip.com>,
        Conor Dooley <conor@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, <linux-pci@...r.kernel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        "Palmer Dabbelt" <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        "Philipp Zabel" <p.zabel@...gutronix.de>,
        Mason Huo <mason.huo@...rfivetech.com>,
        Leyfoon Tan <leyfoon.tan@...rfivetech.com>,
        Kevin Xie <kevin.xie@...rfivetech.com>
Subject: Re: [PATCH v7 0/19] Refactoring Microchip PCIe driver and add
 StarFive PCIe

On Mon, Oct 09, 2023 at 06:58:42PM +0800, Minda Chen wrote:
> 
> 
> On 2023/9/27 18:07, Minda Chen wrote:
> > This patchset final purpose is add PCIe driver for StarFive JH7110 SoC.
> > JH7110 using PLDA XpressRICH PCIe IP. Microchip PolarFire Using the
> > same IP and have commit their codes, which are mixed with PLDA
> > controller codes and Microchip platform codes.
> > 
> > For re-use the PLDA controller codes, I request refactoring microchip
> > codes, move PLDA common codes to PLDA files.
> > Desigware and Cadence is good example for refactoring codes.
> > 
> > So first step is extract the PLDA common codes from microchip, and
> > refactoring the microchip codes.(patch1 - 16)
> > Then, add Starfive codes. (patch17 - 19)
> > 
> > This patchset is base on v6.6-rc3
> > 
> > patch1 is move PLDA XpressRICH PCIe host common properties dt-binding
> >        docs from microchip,pcie-host.yaml
> > patch2 is move PolarFire codes to PLDA directory.
> > patch3 is move PLDA IP register macros to plda-pcie.h
> > patch4 is rename data structure in microchip codes.
> > patch5 is rename two setup functions in microchip codes, prepare to move
> > to common file.
> > patch6 is change the arguments of plda_pcie_setup_iomems()
> > patch7 is move the two setup functions to common file pcie-plda-host.c
> > patch8 is Add PLDA event interrupt codes and IRQ domain ops.
> > patch9 is rename the IRQ related functions, prepare to move to
> > pcie-plda-host.
> > patch10 - 14 is modify the event codes, preparing for support starfive
> > and microchip two platforms.
> > patch15 is move IRQ related functions to pcie-plda-host.c
> > patch16 is set plda_event_handler to static.
> > patch17 is add StarFive JH7110 PCIe dt-binding doc.
> > patch18 is add StarFive JH7110 Soc PCIe codes.
> > patch19 is Starfive dts config
> > 
> Hi Conor and Daire
> Have you ever test this patchset？ I'm sure I am not  change logic of the PolarFire PCIe driver,
> But I can not test it.
> Since this series patch is delegate to nobody and no response now. I don't know when this patch set can be accepted.

I'll try to look at this series again this week. I've been AFK a bit
with holidays etc recently, and been a bit delayed in general. I was
mostly happy with it before, and had left reviewed-bys on most of the
series I think.

> I still hope the refactoring patches can be accepted first

The last patchset Daire sent has been applied:
https://lore.kernel.org/all/169149233963.79399.5232296870054239065.b4-ty@kernel.org/

> (I know you want to add the function of inbound and outbound address translation, Hope this series patch do not influence your upstream plan)

I'd expect this series to go in before the inbound/outbound translation
one, since this is a lot closer to ready & is being resent more often.

Cheers,
Conor.

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