linux-kernel - [PATCH v5 RESEND 7/7] arm64: defconfig: enable clock controller and pinctrl

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Message-ID: <20231011031415.3360-8-quic_tengfan@quicinc.com>
Date:   Wed, 11 Oct 2023 11:14:15 +0800
From:   Tengfei Fan <quic_tengfan@...cinc.com>
To:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
        <catalin.marinas@....com>, <will@...nel.org>
CC:     <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <geert+renesas@...der.be>,
        <arnd@...db.de>, <neil.armstrong@...aro.org>,
        <nfraprado@...labora.com>, <u-kumar1@...com>, <peng.fa@....com>,
        <quic_tsoni@...cinc.com>, <quic_shashim@...cinc.com>,
        <quic_kaushalk@...cinc.com>, <quic_tdas@...cinc.com>,
        <quic_tingweiz@...cinc.com>, <quic_aiquny@...cinc.com>,
        <kernel@...cinc.com>, Tengfei Fan <quic_tengfan@...cinc.com>
Subject: [PATCH v5 RESEND 7/7] arm64: defconfig: enable clock controller and pinctrl

Enable global clock controller and pinctrl for support the Qualcomm
SM4450 platform to boot to UART console.

The serial engine depends on some global clock controller and pinctrl, but
as the serial console driver is only available as built-in, so the global
clock controller and pinctrl also needs be built-in for the UART device to
probe and register the console.

Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
---
 arch/arm64/configs/defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 5f77f5d1fe94..c645ad738c72 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -598,6 +598,7 @@ CONFIG_PINCTRL_SC8280XP=y
 CONFIG_PINCTRL_SDM660=y
 CONFIG_PINCTRL_SDM670=y
 CONFIG_PINCTRL_SDM845=y
+CONFIG_PINCTRL_SM4450=y
 CONFIG_PINCTRL_SM6115=y
 CONFIG_PINCTRL_SM6115_LPASS_LPI=m
 CONFIG_PINCTRL_SM6125=y
@@ -1244,6 +1245,7 @@ CONFIG_SM_DISPCC_6115=m
 CONFIG_SM_DISPCC_8250=y
 CONFIG_SM_DISPCC_8450=m
 CONFIG_SM_DISPCC_8550=m
+CONFIG_SM_GCC_4450=y
 CONFIG_SM_GCC_6115=y
 CONFIG_SM_GCC_8350=y
 CONFIG_SM_GCC_8450=y
-- 
2.17.1