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Message-ID: <e1c9c2ca-144c-49fe-940c-9ca8ad40e377@tuxon.dev>
Date:   Wed, 11 Oct 2023 10:36:56 +0300
From:   claudiu beznea <claudiu.beznea@...on.dev>
To:     Sergei Shtylyov <sergei.shtylyov@...il.com>,
        geert+renesas@...der.be, magnus.damm@...il.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
        mturquette@...libre.com, sboyd@...nel.org
Cc:     linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 1/6] clk: renesas: rzg2l: Use %x format specifier to print
 CLK_ON_R()

Hi, Sergei,

On 10.10.2023 17:52, Sergei Shtylyov wrote:
> Hello!
> 
> On 10/10/23 4:26 PM, Claudiu wrote:
> 
>> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>>
>> Use %x format specifier to print CLK_ON_R(). This is easier when
>> debugging as the value printed will be hexadecimal like in the hardware
>> manual. Along with it "0x" has been added in front of the printed value.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>> ---
>>  drivers/clk/renesas/rzg2l-cpg.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
>> index d62f1bc1f60e..764bd72cf059 100644
>> --- a/drivers/clk/renesas/rzg2l-cpg.c
>> +++ b/drivers/clk/renesas/rzg2l-cpg.c
>> @@ -1213,7 +1213,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
>>  		return 0;
>>  	}
>>  
>> -	dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk,
>> +	dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk,
> 
>    Perhaps "%#x" instead of "0x%x"?

Yes, better, thanks!

> 
> [...]
> 
> MBR, Sergey

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