lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CACPK8Xe5UEDt+ko_FtF-fi1TZDNZeZMtzaU_ZBxt6CO+UHJEpg@mail.gmail.com>
Date:   Wed, 11 Oct 2023 19:56:32 +1030
From:   Joel Stanley <joel@....id.au>
To:     Zev Weiss <zev@...ilderbeest.net>
Cc:     Andrew Jeffery <andrew@...id.au>,
        Guenter Roeck <linux@...ck-us.net>,
        "Milton D. Miller II" <mdmii@...look.com>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        linux-arm-kernel@...ts.infradead.org,
        linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        linux-watchdog@...r.kernel.org, openbmc@...ts.ozlabs.org,
        Eddie James <eajames@...ux.ibm.com>,
        Ivan Mikhaylov <i.mikhaylov@...ro.com>,
        Thomas Weißschuh <linux@...ssschuh.net>
Subject: Re: [PATCH 2/2] watchdog: aspeed: Add support for aspeed,reset-mask
 DT property

On Fri, 22 Sept 2023 at 20:12, Zev Weiss <zev@...ilderbeest.net> wrote:
>
> This property allows the device-tree to specify how the Aspeed
> watchdog timer's reset mask register(s) should be set, so that
> peripherals can be individually exempted from (or opted in to) being
> reset when the watchdog timer expires.
>
> Signed-off-by: Zev Weiss <zev@...ilderbeest.net>

Reviewed-by: Joel Stanley <joel@....id.au>

A note below.

> ---
>  drivers/watchdog/aspeed_wdt.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
> index b72a858bbac7..b4773a6aaf8c 100644
> --- a/drivers/watchdog/aspeed_wdt.c
> +++ b/drivers/watchdog/aspeed_wdt.c
> @@ -79,6 +79,8 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
>  #define   WDT_TIMEOUT_STATUS_BOOT_SECONDARY    BIT(1)
>  #define WDT_CLEAR_TIMEOUT_STATUS       0x14
>  #define   WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION    BIT(0)
> +#define WDT_RESET_MASK1                0x1c
> +#define WDT_RESET_MASK2                0x20
>
>  /*
>   * WDT_RESET_WIDTH controls the characteristics of the external pulse (if
> @@ -402,6 +404,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
>
>         if ((of_device_is_compatible(np, "aspeed,ast2500-wdt")) ||
>                 (of_device_is_compatible(np, "aspeed,ast2600-wdt"))) {
> +               u32 reset_mask[2];
> +               size_t nrstmask = of_device_is_compatible(np, "aspeed,ast2600-wdt") ? 2 : 1;
>                 u32 reg = readl(wdt->base + WDT_RESET_WIDTH);
>
>                 reg &= wdt->cfg->ext_pulse_width_mask;
> @@ -419,6 +423,13 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
>                         reg |= WDT_OPEN_DRAIN_MAGIC;
>
>                 writel(reg, wdt->base + WDT_RESET_WIDTH);
> +
> +               ret = of_property_read_u32_array(np, "aspeed,reset-mask", reset_mask, nrstmask);
> +               if (!ret) {
> +                       writel(reset_mask[0], wdt->base + WDT_RESET_MASK1);
> +                       if (nrstmask > 1)
> +                               writel(reset_mask[1], wdt->base + WDT_RESET_MASK2);
> +               }

This will do funky things if someone is careless enough to put the
property in an ast2400 device tree.

The ast2700 has four reset mask registers. Not really your problem at
this point, but we might need to move to a per-soc callback in the
platform data or similar.

>         }
>
>         if (!of_property_read_u32(np, "aspeed,ext-pulse-duration", &duration)) {
> --
> 2.40.0.5.gf6e3b97ba6d2.dirty
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ