linux-kernel - Re: [PATCH v3 6/6] dmaengine: dw-edma: eDMA: Add sync read before starting the DMA transfer in remote setup

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Date:   Wed, 11 Oct 2023 13:51:28 +0300
From:   Serge Semin <fancer.lancer@...il.com>
To:     Kory Maincent <kory.maincent@...tlin.com>
Cc:     Manivannan Sadhasivam <mani@...nel.org>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Vinod Koul <vkoul@...nel.org>,
        Cai Huoqing <cai.huoqing@...ux.dev>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org,
        Herve Codina <herve.codina@...tlin.com>
Subject: Re: [PATCH v3 6/6] dmaengine: dw-edma: eDMA: Add sync read before
 starting the DMA transfer in remote setup

On Wed, Oct 11, 2023 at 10:11:45AM +0200, Kory Maincent wrote:
> The Linked list element and pointer are not stored in the same memory as
> the eDMA controller register. If the doorbell register is toggled before
> the full write of the linked list a race condition error can appears.

s/can appears/will occur

> In remote setup we can only use a readl to the memory to assured the full

s/assured/assure

> write has occurred.
> 
> Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support")
> Signed-off-by: Kory Maincent <kory.maincent@...tlin.com>

Reviewed-by: Serge Semin <fancer.lancer@...il.com>

-Serge(y)

> ---
> 
> Changes in v2:
> - New patch
> ---
>  drivers/dma/dw-edma/dw-edma-v0-core.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c
> index b38786f0ad79..6245b720fbfe 100644
> --- a/drivers/dma/dw-edma/dw-edma-v0-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
> @@ -346,6 +346,20 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
>  	dw_edma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr);
>  }
>  
> +static void dw_edma_v0_sync_ll_data(struct dw_edma_chunk *chunk)
> +{
> +	/*
> +	 * In case of remote eDMA engine setup, the DW PCIe RP/EP internals
> +	 * configuration registers and Application memory are normally accessed
> +	 * over different buses. Ensure LL-data reaches the memory before the
> +	 * doorbell register is toggled by issuing the dummy-read from the remote
> +	 * LL memory in a hope that the posted MRd TLP will return only after the
> +	 * last MWr TLP is completed
> +	 */
> +	if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
> +		readl(chunk->ll_region.vaddr.io);
> +}
> +
>  static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
>  {
>  	struct dw_edma_chan *chan = chunk->chan;
> @@ -412,6 +426,9 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
>  		SET_CH_32(dw, chan->dir, chan->id, llp.msb,
>  			  upper_32_bits(chunk->ll_region.paddr));
>  	}
> +
> +	dw_edma_v0_sync_ll_data(chunk);
> +
>  	/* Doorbell */
>  	SET_RW_32(dw, chan->dir, doorbell,
>  		  FIELD_PREP(EDMA_V0_DOORBELL_CH_MASK, chan->id));
> 
> -- 
> 2.25.1
>