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Message-ID: <20231012-extradite-charbroil-32c0808c6669@spud>
Date: Thu, 12 Oct 2023 15:51:01 +0100
From: Conor Dooley <conor@...nel.org>
To: Charlie Jenkins <charlie@...osinc.com>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Samuel Holland <samuel.holland@...ive.com>,
David Laight <David.Laight@...lab.com>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-arch@...r.kernel.org,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH v7 3/4] riscv: Add checksum library
Hey,
On Tue, Sep 19, 2023 at 11:44:32AM -0700, Charlie Jenkins wrote:
> Provide a 32 and 64 bit version of do_csum. When compiled for 32-bit
> will load from the buffer in groups of 32 bits, and when compiled for
> 64-bit will load in groups of 64 bits.
>
> Signed-off-by: Charlie Jenkins <charlie@...osinc.com>
> ---
> arch/riscv/include/asm/checksum.h | 12 +++
> arch/riscv/lib/Makefile | 1 +
> arch/riscv/lib/csum.c | 217 ++++++++++++++++++++++++++++++++++++++
> 3 files changed, 230 insertions(+)
>
> diff --git a/arch/riscv/include/asm/checksum.h b/arch/riscv/include/asm/checksum.h
> index dc0dd89f2a13..7fcd07edb8b3 100644
> --- a/arch/riscv/include/asm/checksum.h
> +++ b/arch/riscv/include/asm/checksum.h
> @@ -12,6 +12,18 @@
>
> #define ip_fast_csum ip_fast_csum
>
> +extern unsigned int do_csum(const unsigned char *buff, int len);
> +#define do_csum do_csum
> +
> +/* Default version is sufficient for 32 bit */
> +#ifdef CONFIG_64BIT
> +#define _HAVE_ARCH_IPV6_CSUM
> +__sum16 csum_ipv6_magic(const struct in6_addr *saddr,
> + const struct in6_addr *daddr,
> + __u32 len, __u8 proto, __wsum sum);
> +#endif
> +
> +// Define riscv versions of functions before importing asm-generic/checksum.h
As a nit item, you're using two different one-line comment styles in
this hunk. Otherwise, looks like you've addressed the things I didn't
like, as much as was possible. You get an a-b, not an r-b since I've not
reviewed the actual algorithm here.
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks,
Conor.
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