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Message-ID: <20231012180540.byvdiwtx7bgixidk@synopsys.com>
Date: Thu, 12 Oct 2023 18:05:54 +0000
From: Thinh Nguyen <Thinh.Nguyen@...opsys.com>
To: Piyush Mehta <piyush.mehta@....com>
CC: "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"michal.simek@....com" <michal.simek@....com>,
Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"git@....com" <git@....com>
Subject: Re: [PATCH] usb: dwc3: xilinx: add reset-controller support
On Thu, Oct 05, 2023, Piyush Mehta wrote:
> Add a reset-controller for supporting Xilinx versal platforms. To reset
> the USB controller, get the reset ID from device-tree and using ID trigger
> the reset, with the assert and deassert reset controller APIs for USB
> controller initialization. Delay of microseconds is added in between assert
> and deassert to meet the setup and hold the time requirement of the reset.
>
> Signed-off-by: Piyush Mehta <piyush.mehta@....com>
> ---
> drivers/usb/dwc3/dwc3-xilinx.c | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c
> index 19307d24f3a0..d0780bf231fb 100644
> --- a/drivers/usb/dwc3/dwc3-xilinx.c
> +++ b/drivers/usb/dwc3/dwc3-xilinx.c
> @@ -32,9 +32,6 @@
> #define XLNX_USB_TRAFFIC_ROUTE_CONFIG 0x005C
> #define XLNX_USB_TRAFFIC_ROUTE_FPD 0x1
>
> -/* Versal USB Reset ID */
> -#define VERSAL_USB_RESET_ID 0xC104036
> -
> #define XLNX_USB_FPD_PIPE_CLK 0x7c
> #define PIPE_CLK_DESELECT 1
> #define PIPE_CLK_SELECT 0
> @@ -72,20 +69,26 @@ static void dwc3_xlnx_mask_phy_rst(struct dwc3_xlnx *priv_data, bool mask)
> static int dwc3_xlnx_init_versal(struct dwc3_xlnx *priv_data)
> {
> struct device *dev = priv_data->dev;
> + struct reset_control *crst;
> int ret;
>
> + crst = devm_reset_control_get_exclusive(dev, NULL);
> + if (IS_ERR(crst))
> + return dev_err_probe(dev, PTR_ERR(crst), "failed to get reset signal\n");
> +
> dwc3_xlnx_mask_phy_rst(priv_data, false);
>
> /* Assert and De-assert reset */
> - ret = zynqmp_pm_reset_assert(VERSAL_USB_RESET_ID,
> - PM_RESET_ACTION_ASSERT);
> + ret = reset_control_assert(crst);
> if (ret < 0) {
> dev_err_probe(dev, ret, "failed to assert Reset\n");
> return ret;
> }
>
> - ret = zynqmp_pm_reset_assert(VERSAL_USB_RESET_ID,
> - PM_RESET_ACTION_RELEASE);
> + /* reset hold time */
> + usleep_range(5, 10);
Was this delay needed before? If so, is this a fix patch?
> +
> + ret = reset_control_deassert(crst);
> if (ret < 0) {
> dev_err_probe(dev, ret, "failed to De-assert Reset\n");
> return ret;
> --
> 2.17.1
>
BR,
Thinh
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