linux-kernel - Re: Sony IMX290/462 image sensors I2C xfer peculiarity

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20231012220127.GB27838@stcim.de>
Date:   Fri, 13 Oct 2023 00:01:27 +0200
From:   Stefan Lengfeld <stefan@...gfeld.xyz>
To:     Krzysztof Hałasa <khalasa@...p.pl>
Cc:     linux-media <linux-media@...r.kernel.org>,
        lkml <linux-kernel@...r.kernel.org>,
        Dave Stevenson <dave.stevenson@...pberrypi.com>,
        Oleksij Rempel <linux@...pel-privat.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>, linux-i2c@...r.kernel.org
Subject: Re: Sony IMX290/462 image sensors I2C xfer peculiarity

Hi Chris,

> > My understand is that an ordinary I2C device would just use normal (and
> > sleepable) I2C transfers while the device is in use.
> 
> You are spot-on here :-) Now I use IMX 290 and 462.
> 
> OTOH I wonder if such issues are limited to those sensors only.

Hmm, yes. I know no other I2C device that has these timeout issues. (*)

> The problem is I use Sony IMX290 and IMX462 image sensors, and they have
> an apparently hard-coded timeout of about 2^18 their master clock cycles
> (= ca. 7 ms with my setup). After the timeout they simply disconnect
> from the I2C bus. Of course, this isn't mentioned in the docs.

hmm. I have no idea about this sensor and your setup. So I can just give hints:

This timeout seems strange. If this 7 ms timeout is required, it would mean
that I2C masters require to fullfill real-time/deadline requirements.  For
"small" I2C master in microcontrolles this seems ok-ish, but for general
operating systems real-time requirements are hard.  The real-time patches for
linux just landed recently and it still requires fine tuning the system for the
required deadlines.

Maybe you just hit a corner case or a bug, that can be avoid, in the I2C
device.  Maybe check with the manufacturer directly?

> Unfortunately, "normal" I2C accesses take frequently more than those
> 7 ms (mostly due to scheduling when all CPU cores are in use).

Yes, correctly. There are multiple cases in which I2C transactions to the same
device can be preempted/delayed: A busy system, as you said, or when some other driver
in the kernel accesses another I2C device on the same bus. This will lock the
bus/I2C adapter for the duration of its transfer.

Do you know the I2C repeated start feature [1]? This allows to batch together
multiple I2C read/writes in a single transfer. And in the best case, this
transfer is executed in one go without a delay in between. At least in the
kernel it's guaranteed that no other driver can go in between with another
transfer.

Kind regards,
Stefan

[1]: https://www.i2c-bus.org/repeated-start-condition/

(*) Fun answer: Actually external watchdogs have timeouts. But the timeout
duration is in the range of seconds, not milliseconds. And timeout expiration
is expected (in error cases ;-).