linux-kernel - Re: [PATCH v10 05/16] drm/mediatek: gamma: Enable the Gamma LUT table only after programming

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 12 Oct 2023 05:17:21 +0000
From:   CK Hu (胡俊光) <ck.hu@...iatek.com>
To:     "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        "chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>
CC:     "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "wenst@...omium.org" <wenst@...omium.org>,
        Jason-JH Lin (林睿祥) 
        <Jason-JH.Lin@...iatek.com>,
        "kernel@...labora.com" <kernel@...labora.com>,
        "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        "amergnat@...libre.com" <amergnat@...libre.com>,
        "ehristev@...labora.com" <ehristev@...labora.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>
Subject: Re: [PATCH v10 05/16] drm/mediatek: gamma: Enable the Gamma LUT table
 only after programming

Hi, Angelo:

On Fri, 2023-08-04 at 09:28 +0200, AngeloGioacchino Del Regno wrote:
> Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
> programming the actual table to avoid potential visual glitches
> during
> table modification.
> 
> Note:
> GAMMA should get enabled in between vblanks, but this requires many
> efforts in order to make this happen, as that requires migrating all
> of the writes to make use of CMDQ instead of cpu writes and that's
> not trivial. For this reason, this patch only moves the LUT enable.
> The CMDQ rework will come at a later time.
> 
> Signed-off-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>
> Reviewed-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> Reviewed-by: Alexandre Mergnat <amergnat@...libre.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 ++++++++-----
>  1 file changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index fd6a75a64a9f..18b102bef370 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -68,12 +68,12 @@ unsigned int mtk_gamma_get_lut_size(struct device
> *dev)
>  void mtk_gamma_set_common(struct device *dev, void __iomem *regs,
> struct drm_crtc_state *state)
>  {
>  	struct mtk_disp_gamma *gamma;
> -	unsigned int i, reg;
> +	unsigned int i;
>  	struct drm_color_lut *lut;
>  	void __iomem *lut_base;
>  	bool lut_diff;
>  	u16 lut_size;
> -	u32 word;
> +	u32 cfg_val, word;
>  
>  	/* If there's no gamma lut there's nothing to do here. */
>  	if (!state->gamma_lut)
> @@ -90,9 +90,7 @@ void mtk_gamma_set_common(struct device *dev, void
> __iomem *regs, struct drm_crt
>  		lut_size = LUT_SIZE_DEFAULT;
>  	}
>  
> -	reg = readl(regs + DISP_GAMMA_CFG);
> -	reg = reg | GAMMA_LUT_EN;
> -	writel(reg, regs + DISP_GAMMA_CFG);
> +	cfg_val = readl(regs + DISP_GAMMA_CFG);

Move this to bottom of this function. Move here in the patch which
need.

After this modification,

Reviewed-by: CK Hu <ck.hu@...iatek.com>

>  	lut_base = regs + DISP_GAMMA_LUT;
>  	lut = (struct drm_color_lut *)state->gamma_lut->data;
>  	for (i = 0; i < lut_size; i++) {
> @@ -122,6 +120,11 @@ void mtk_gamma_set_common(struct device *dev,
> void __iomem *regs, struct drm_crt
>  		}
>  		writel(word, (lut_base + i * 4));
>  	}
> +
> +	/* Enable the gamma table */
> +	cfg_val = cfg_val | GAMMA_LUT_EN;
> +
> +	writel(cfg_val, regs + DISP_GAMMA_CFG);
>  }
>  
>  void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)