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Date:   Wed, 11 Oct 2023 23:36:24 -0700
From:   Satya Durga Srinivasu Prabhala <quic_satyap@...cinc.com>
To:     Abel Vesa <abel.vesa@...aro.org>, Andy Gross <agross@...nel.org>,
        "Bjorn Andersson" <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>
CC:     <linux-arm-msm@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Avinash Philip <quic_avinashp@...cinc.com>,
        Umnathi Chalicheemala <quic_uchalich@...cinc.com>
Subject: Re: [PATCH] soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset


On 10/11/2023 11:11 PM, Abel Vesa wrote:
> According to documentation, it has increments of 4, not 8.
>
> Fixes: c72ca343f911 ("soc: qcom: llcc: Add v4.1 HW version support")
> Reported-by: Umnathi Chalicheemala <quic_uchalich@...cinc.com>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>

Thanks Abel.

Reviewed-by: Satya Durga Srinivasu Prabhala <quic_satyap@...cinc.com>

> ---
>   drivers/soc/qcom/llcc-qcom.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 674abd0d6700..fb4085b7cb19 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -47,7 +47,7 @@
>   #define LLCC_TRP_STATUSn(n)           (4 + n * SZ_4K)
>   #define LLCC_TRP_ATTR0_CFGn(n)        (0x21000 + SZ_8 * n)
>   #define LLCC_TRP_ATTR1_CFGn(n)        (0x21004 + SZ_8 * n)
> -#define LLCC_TRP_ATTR2_CFGn(n)        (0x21100 + SZ_8 * n)
> +#define LLCC_TRP_ATTR2_CFGn(n)        (0x21100 + SZ_4 * n)
>   
>   #define LLCC_TRP_SCID_DIS_CAP_ALLOC   0x21f00
>   #define LLCC_TRP_PCB_ACT              0x21f04

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