linux-kernel - [PATCH v2] soc: renesas: make ARCH_R9A07G043 depend on required options

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Message-Id: <20231012-pouch-parkway-7d26c04b3300@spud>
Date:   Thu, 12 Oct 2023 12:04:28 +0100
From:   Conor Dooley <conor@...nel.org>
To:     linux-renesas-soc@...r.kernel.org
Cc:     conor@...nel.org, Conor Dooley <conor.dooley@...rochip.com>,
        Randy Dunlap <rdunlap@...radead.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: [PATCH v2] soc: renesas: make ARCH_R9A07G043 depend on required options

From: Conor Dooley <conor.dooley@...rochip.com>

Randy reported a randconfig build issue against linux-next:
WARNING: unmet direct dependencies detected for ERRATA_ANDES
  Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y]
  Selected by [y]:
  - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y]

../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration
   59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,

On RISC-V, alternatives are not usable in XIP kernels, which this
randconfig happened to select. Rather than add a check for whether
alternatives are available before selecting the ERRATA_ANDES config
option, rework the R9A07G043 Kconfig entry to depend on the
configuration options required to support its non-standard cache
coherency implementation.

Without these options enabled, the SoC is effectively non-functional to
begin with, so there's an extra benefit in preventing the creation of
non-functional kernels.

The "if RISCV_DMA_NONCOHERENT" can be dropped, as ERRATA_ANDES_CMO will
select it.

Reported-by: Randy Dunlap <rdunlap@...radead.org>
Closes: https://lore.kernel.org/all/09a6b0f0-76a1-45e3-ab52-329c47393d1d@infradead.org/
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---

I dropped Randy's t-b etc since this patch is quite different.

v2: drop the extra condition on the select of ERRATA_ANDES, move instead
to depending on required options.

CC: Geert Uytterhoeven <geert+renesas@...der.be>
CC: Magnus Damm <magnus.damm@...il.com>
CC: Paul Walmsley <paul.walmsley@...ive.com>
CC: Palmer Dabbelt <palmer@...belt.com>
CC: Albert Ou <aou@...s.berkeley.edu>
CC: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
CC: linux-renesas-soc@...r.kernel.org
CC: linux-kernel@...r.kernel.org
CC: linux-riscv@...ts.infradead.org
---
 drivers/soc/renesas/Kconfig | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 7b74de732718..adedf02897c6 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -340,10 +340,12 @@ if RISCV
 config ARCH_R9A07G043
 	bool "RISC-V Platform support for RZ/Five"
 	depends on NONPORTABLE
+	depends on RISCV_ALTERNATIVE
+	depends on RISCV_SBI
 	select ARCH_RZG2L
-	select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT
+	select AX45MP_L2_CACHE
 	select DMA_GLOBAL_POOL
-	select ERRATA_ANDES if RISCV_SBI
+	select ERRATA_ANDES
 	select ERRATA_ANDES_CMO if ERRATA_ANDES
 	help
 	  This enables support for the Renesas RZ/Five SoC.
-- 
2.39.2