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Message-ID: <ZSfyqaWsNh3mR26I@xhacker>
Date:   Thu, 12 Oct 2023 21:20:41 +0800
From:   Jisheng Zhang <jszhang@...nel.org>
To:     Inochi Amaoto <inochiama@...look.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Chao Wei <chao.wei@...hgo.com>,
        Chen Wang <unicorn_wang@...look.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Anup Patel <anup@...infault.org>, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 0/7] Add Huashan Pi board support

On Mon, Oct 09, 2023 at 07:25:14PM +0800, Inochi Amaoto wrote:
> Huashan Pi board is an embedded development platform based on the
> CV1812H chip. Add minimal device tree files for this board.
> Currently, it can boot to a basic shell.
> 
> NOTE: this series is based on the Jisheng's Milk-V Duo patch.
> 
> Link: https://en.sophgo.com/product/introduce/huashan.html
> Link: https://en.sophgo.com/product/introduce/cv181xH.html
> 
> Changed from v1:
> 1. split the patch into several patch and refactor them.
> 
> Inochi Amaoto (7):
>   dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic
>   dt-bindings: timer: Add SOPHGO CV1812H clint
>   dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles
>   riscv: dts: sophgo: Separate common devices from cv1800b soc
>   riscv: dts: sophgo: cv180x: Add gpio devices
>   riscv: dts: sophgo: add initial CV1812H SoC device tree
>   riscv: dts: sophgo: add Huashan Pi board device tree

For the patch series:
Reviewed-by: Jisheng Zhang <jszhang@...nel.org>
> 
>  .../sifive,plic-1.0.0.yaml                    |  1 +
>  .../devicetree/bindings/riscv/sophgo.yaml     |  4 +
>  .../bindings/timer/sifive,clint.yaml          |  1 +
>  arch/riscv/boot/dts/sophgo/Makefile           |  1 +
>  arch/riscv/boot/dts/sophgo/cv1800b.dtsi       | 95 +------------------
>  .../dts/sophgo/{cv1800b.dtsi => cv180x.dtsi}  | 91 ++++++++++++++----
>  .../boot/dts/sophgo/cv1812h-huashan-pi.dts    | 48 ++++++++++
>  arch/riscv/boot/dts/sophgo/cv1812h.dtsi       | 36 +++++++
>  8 files changed, 165 insertions(+), 112 deletions(-)
>  copy arch/riscv/boot/dts/sophgo/{cv1800b.dtsi => cv180x.dtsi} (58%)
>  create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
>  create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> 
> --
> 2.42.0
> 

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