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Message-ID: <c7419e6e-d53e-4820-83da-3ddf188e8fd7@gmail.com>
Date: Fri, 13 Oct 2023 15:44:43 +0800
From: Jacky Huang <ychuang570808@...il.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linus.walleij@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
p.zabel@...gutronix.de, j.neuschaefer@....net
Cc: linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
schung@...oton.com, Jacky Huang <ychuang3@...oton.com>
Subject: Re: [PATCH 3/4] arm64: dts: nuvoton: Add pinctrl support for ma35d1
On 2023/10/13 下午 03:06, Krzysztof Kozlowski wrote:
> On 13/10/2023 08:52, Jacky Huang wrote:
>>>> +
>>>> +&pinctrl {
>>>> + uart0 {
>>>> + pinctrl_uart0: uart0grp {
>>>> + nuvoton,pins =
>>>> + <MA35_SYS_REG_GPE_H 24 1 &pcfg_default>,
>>>> + <MA35_SYS_REG_GPE_H 28 1 &pcfg_default>;
>>> This does not look like generic pinctrl bindings. Looks
>>> over-complicated. From where did you get it? Which recent bindings and
>>> drivers where used as an example? Register addresses should be in the
>>> driver. Bit offsets as well. "multi-pin-function-value" confuses me. All
>>> this is not really suitable for DTS.
>> Okay, I will update the first and second items to 'pin bank' and 'pin
>> bank index,
>> just as others have done, and leave the driver to handle the conversion into
>> registers and offsets.
> Instead use existing common properties, like "pins" and "groups" (or
> pinmux).
I will reference how others have done it to make the changes.
>> The term "multi-pin-function-value" is used to specify the device function.
>> I will use the name "device function" instead of "multi-pin-function-value.
> Use existing common properties, like "function". Do not reinvent the
> bindings.
>
Okay, I got it. Thank you.
>
> Best regards,
> Krzysztof
>
Best Regards,
Jacky Huang
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