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Message-ID: <ZSpVtZhks7Wm5Upc@gmail.com>
Date: Sat, 14 Oct 2023 10:47:49 +0200
From: Ingo Molnar <mingo@...nel.org>
To: Ashish Kalra <Ashish.Kalra@....com>
Cc: dave.hansen@...ux.intel.com, luto@...nel.org, tglx@...utronix.de,
mingo@...hat.com, bp@...en8.de, x86@...nel.org, hpa@...or.com,
thomas.lendacky@....com, linux-kernel@...r.kernel.org,
peterz@...radead.org
Subject: Re: [PATCH] x86/mm: fix pg_level_to_pfn for 5-level paging mode.
* Ashish Kalra <Ashish.Kalra@....com> wrote:
> From: Ashish Kalra <ashish.kalra@....com>
>
> Add support for 5-level paging in pg_level_to_pfn().
>
> Signed-off-by: Ashish Kalra <ashish.kalra@....com>
> ---
> arch/x86/mm/mem_encrypt_amd.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c
> index 6faea41e99b6..45914568596a 100644
> --- a/arch/x86/mm/mem_encrypt_amd.c
> +++ b/arch/x86/mm/mem_encrypt_amd.c
> @@ -267,6 +267,10 @@ static unsigned long pg_level_to_pfn(int level, pte_t *kpte, pgprot_t *ret_prot)
> pfn = pud_pfn(*(pud_t *)kpte);
> prot = pud_pgprot(*(pud_t *)kpte);
> break;
> + case PG_LEVEL_512G:
> + pfn = p4d_pfn(*(p4d_t *)kpte);
> + prot = p4d_pgprot(*(p4d_t *)kpte);
> + break;
Mind explaining what happens if we don't have this fix, how you found it,
which users are expected to be affected by it, whether that's the full
known extent of 5-level paging support deficiencies in mem_encrypt_amd.c,
etc?
In addition to such patches being much easier on the eyes, it also helps
maintainers prioritize patches.
Thanks,
Ingo
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