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Message-ID: <20231015193901.2344590-5-quic_omprsing@quicinc.com>
Date:   Mon, 16 Oct 2023 01:09:01 +0530
From:   Om Prakash Singh <quic_omprsing@...cinc.com>
To:     <quic_omprsing@...cinc.com>
CC:     <neil.armstrong@...aro.org>, <konrad.dybcio@...aro.org>,
        <agross@...nel.org>, <andersson@...nel.org>, <conor+dt@...nel.org>,
        <davem@...emloft.net>, <devicetree@...r.kernel.org>,
        <herbert@...dor.apana.org.au>, <krzysztof.kozlowski+dt@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-crypto@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <marijn.suijten@...ainline.org>,
        <robh+dt@...nel.org>, <vkoul@...nel.org>
Subject: [PATCH V1 4/4] arm64: dts: qcom: sc7280: add TRNG node
The sc7280 SoC has a True Random Number Generator, add the node with
the correct compatible set.
Signed-off-by: Om Prakash Singh <quic_omprsing@...cinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 925428a5f6ae..dc4332296a3e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -5368,6 +5368,11 @@ cpufreq_hw: cpufreq@...91000 {
 			#freq-domain-cells = <1>;
 			#clock-cells = <1>;
 		};
+
+		rng: rng@...3000 {
+			compatible = "qcom,sc7280-trng", "qcom,trng";
+			reg = <0 0x10d3000 0 0x1000>;
+		};
 	};
 
 	thermal_zones: thermal-zones {
-- 
2.25.1
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