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Message-Id: <169749720983.709368.13661754156308362398.b4-ty@arm.com>
Date: Tue, 17 Oct 2023 00:03:54 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: linux-arm-kernel@...ts.infradead.org,
Anshuman Khandual <anshuman.khandual@....com>
Cc: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
Leo Yan <leo.yan@...aro.org>, Will Deacon <will@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Jonathan Corbet <corbet@....net>, coresight@...ts.linaro.org,
James Clark <james.clark@....com>, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V7 0/3] coresight: etm: Make cycle count threshold user configurable
On Thu, 21 Sep 2023 09:06:28 +0530, Anshuman Khandual wrote:
> This series makes ETM TRCCCCTRL based 'cc_threshold' user configurable via
> the perf event attribute. But first, this implements an errata work around
> affecting ETM TRCIDR3.CCITMIN value on certain cpus, overriding the field.
>
> This series applies on coresight/for-next/queue.
>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Suzuki K Poulose <suzuki.poulose@....com>
> Cc: Mike Leach <mike.leach@...aro.org>
> Cc: James Clark <james.clark@....com>
> Cc: Leo Yan <leo.yan@...aro.org>
> Cc: Jonathan Corbet <corbet@....net>
> Cc: linux-doc@...r.kernel.org
> Cc: coresight@...ts.linaro.org
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
>
> [...]
Applied, thanks!
[1/3] coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus
https://git.kernel.org/coresight/c/0f55b43dedcd
[2/3] coresight: etm: Make cycle count threshold user configurable
https://git.kernel.org/coresight/c/0cf805fec179
[3/3] Documentation: coresight: Add cc_threshold tunable
https://git.kernel.org/coresight/c/2b690bebb569
Best regards,
--
Suzuki K Poulose <suzuki.poulose@....com>
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