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Message-ID: <ZSziGA6ao+KG3l8q@matsya>
Date: Mon, 16 Oct 2023 12:41:20 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Martin Povišer <povik+lin@...ebit.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, asahi@...ts.linux.dev,
dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/2] dmaengine: apple-sio: Add Apple SIO driver
On 13-10-23, 18:49, Martin Povišer wrote:
> +static struct dma_async_tx_descriptor *sio_prep_dma_cyclic(
this should generate a check warning, typically lines should not end with a '('
> + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
> + size_t period_len, enum dma_transfer_direction direction,
> + unsigned long flags)
also helps to align with the open brace to something like:
static struct dma_async_tx_descriptor *
sio_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
size_t period_len, enum dma_transfer_direction direction,
unsigned long flags)
> +static bool sio_fill_in_locked(struct sio_chan *siochan);
> +
> +static void sio_handle_issue_ack(struct sio_chan *siochan, void *cookie, bool ok)
> +{
> + dma_cookie_t tx_cookie = (unsigned long) cookie;
space not required after a cast
> +static struct dma_chan *sio_dma_of_xlate(struct of_phandle_args *dma_spec,
> + struct of_dma *ofdma)
> +{
> + struct sio_data *sio = (struct sio_data *) ofdma->of_dma_data;
drop space after cast here too
> +static int sio_device_config(struct dma_chan *chan,
> + struct dma_slave_config *config)
> +{
> + struct sio_chan *siochan = to_sio_chan(chan);
> + struct sio_data *sio = siochan->host;
> + bool is_tx = sio_chan_direction(siochan->no) == DMA_MEM_TO_DEV;
> + struct sio_shmem_chan_config *cfg_shmem = sio->shmem;
> + struct sio_shmem_chan_config cfg;
> + int ret;
> +
> + switch (is_tx ? config->dst_addr_width : config->src_addr_width) {
> + case DMA_SLAVE_BUSWIDTH_1_BYTE:
> + cfg.datashape = 0;
> + break;
> + case DMA_SLAVE_BUSWIDTH_2_BYTES:
> + cfg.datashape = 1;
> + break;
> + case DMA_SLAVE_BUSWIDTH_4_BYTES:
> + cfg.datashape = 2;
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + cfg.fifo = 0x800;
> + cfg.limit = 0x800;
> + cfg.threshold = 0x800;
what do these values represent, should this not be passed by the client
> +static int sio_alloc_shmem(struct sio_data *sio)
> +{
> + dma_addr_t iova;
> + int err;
> +
> + sio->shmem = dma_alloc_coherent(sio->dev, SIO_SHMEM_SIZE,
> + &iova, GFP_KERNEL);
> + if (!sio->shmem)
> + return -ENOMEM;
> +
> + sio->shmem_desc_base = (struct sio_coproc_desc *) (sio->shmem + 56);
here too
> +static int sio_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct sio_data *sio;
> + struct dma_device *dma;
> + int nchannels;
> + int err, i;
> +
> + err = of_property_read_u32(np, "dma-channels", &nchannels);
why not use device_property_read_u32()
--
~Vinod
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