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Message-ID: <ZSz8h6fc7R3CiioE@hovoldconsulting.com>
Date: Mon, 16 Oct 2023 11:04:07 +0200
From: Johan Hovold <johan@...nel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Johan Hovold <johan+linaro@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sc8280xp-crd: fix eDP phy compatible
On Mon, Oct 16, 2023 at 11:53:02AM +0300, Dmitry Baryshkov wrote:
> On Mon, 16 Oct 2023 at 11:07, Johan Hovold <johan+linaro@...nel.org> wrote:
> >
> > The sc8280xp Display Port PHYs can be used in either DP or eDP mode and
> > this is configured using the devicetree compatible string which defaults
> > to DP mode in the SoC dtsi.
> >
> > Override the default compatible string for the CRD eDP PHY node so that
> > the eDP settings are used.
> >
> > Fixes: 4a883a8d80b5 ("arm64: dts: qcom: sc8280xp-crd: Enable EDP")
> > Cc: stable@...r.kernel.org # 6.3
> > Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> > ---
> > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> > index 772953dc428e..31a2a2d27f4e 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> > @@ -458,6 +458,8 @@ mdss0_dp3_out: endpoint {
> > };
> >
> > &mdss0_dp3_phy {
> > + compatible = "qcom,sc8280xp-edp-phy";
>
> Same question here as the one I've sent for Konrad's patch. Is it the
> same PHY type, just being repurposed for eDP or is it a different PHY
> type?
Just replied in the other thread:
https://lore.kernel.org/lkml/ZSz7---IW_7Oj2Zr@hovoldconsulting.com/
Johan
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