linux-kernel - Re: [RESEND PATCH] pinctrl: qcom: lpass-lpi: fix concurrent register updates

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Message-ID: <CACRpkdaybnYEmkgv7VG4fh5sXQ7uwHm2wH2Khja-P1b6idYr8w@mail.gmail.com>
Date:   Mon, 16 Oct 2023 14:58:17 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [RESEND PATCH] pinctrl: qcom: lpass-lpi: fix concurrent register updates

On Fri, Oct 13, 2023 at 4:57 PM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:


> The Qualcomm LPASS LPI pin controller driver uses one lock for guarding
> Read-Modify-Write code for slew rate registers.  However the pin
> configuration and muxing registers have exactly the same RMW code but
> are not protected.
>
> Pin controller framework does not provide locking here, thus it is
> possible to trigger simultaneous change of pin configuration registers
> resulting in non-atomic changes.
>
> Protect from concurrent access by re-using the same lock used to cover
> the slew rate register.  Using the same lock instead of adding second
> one will make more sense, once we add support for newer Qualcomm SoC,
> where slew rate is configured in the same register as pin
> configuration/muxing.
>
> Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
> Cc: stable@...r.kernel.org
> Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>
> ---
>
> Added Linus' review. Resending because no one picked up this patch.

What a mess, I applied the patch for fixes so I try to cram in a last
pull request before the merge window.

Yours,
Linus Walleij