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Message-ID: <6182d9f9-8810-4704-b314-a5612d2aa795@starfivetech.com>
Date: Tue, 17 Oct 2023 13:43:10 +0800
From: Minda Chen <minda.chen@...rfivetech.com>
To: Conor Dooley <conor@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh+dt@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
"Daire McNamara" <daire.mcnamara@...rochip.com>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-riscv@...ts.infradead.org>, <linux-pci@...r.kernel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Philipp Zabel <p.zabel@...gutronix.de>,
Mason Huo <mason.huo@...rfivetech.com>,
Leyfoon Tan <leyfoon.tan@...rfivetech.com>,
Kevin Xie <kevin.xie@...rfivetech.com>
Subject: Re: [PATCH v8 0/22] Refactoring Microchip PCIe driver and add
StarFive PCIe
On 2023/10/11 19:04, Minda Chen wrote:
> This patchset final purpose is add PCIe driver for StarFive JH7110 SoC.
> JH7110 using PLDA XpressRICH PCIe IP. Microchip PolarFire Using the
> same IP and have commit their codes, which are mixed with PLDA
> controller codes and Microchip platform codes.
>
> For re-use the PLDA controller codes, I request refactoring microchip
> codes, move PLDA common codes to PLDA files.
> Desigware and Cadence is good example for refactoring codes.
>
> ----------------------------------------------------------
> The refactoring patches total number is 17,(patch 1-17)
> which do NOT contain changing logic of codes.
>
> These patches just contain three type basic operations.
> (rename, modify codes to support starfive platform, and moving to common file)
> If these patched are all be reviewed. They can be accepted first.
>
> Refactoring patches can be devided to different groups
> 1. (patch 1- 3 is the prepare work of refactoring)
> patch1 is move PLDA XpressRICH PCIe host common properties dt-binding
> docs from microchip,pcie-host.yaml
> patch2 is move PolarFire codes to PLDA directory.
> patch3 is move PLDA IP register macros to plda-pcie.h
>
> 2. (patch4 - 6 is processing and re-use PCIe host instance)
> patch4 is add bridge_addr field to PCIe host instance.
> patch5 is rename data structure in microchip codes.
> patch6 is moving two data structures to head file
>
> 3. (patch 7 - 9 are for re-use two PCIe setup function)
> patch7 is rename two setup functions in microchip codes, prepare to move
> to common file.
> patch8 is change the arguments of plda_pcie_setup_iomems()
> patch9 is move the two setup functions to common file pcie-plda-host.c
>
> 4.(patch 10 - 17 are for re-use interupt processing codes)
> patch10 add a plda default event handler function.
> patch11 is rename the IRQ related functions, prepare to move to
> pcie-plda-host.c
> patch 12 - 16 is modify the interrupt event codes, preparing for support starfive
> and microchip two platforms.
> patch17 is move IRQ related functions to pcie-plda-host.c
>
> ------------------------------------------------------------
> The remainder patches (patch 18 -22) are not refactoring patch.
> They are for adding StarFive codes and dont modify the microchip's
> codes.
>
> patch18 is set plda_event_handler to static.
> patch19 is Add PLDA event interrupt codes and IRQ domain ops.
> patch20 is add StarFive JH7110 PCIe dt-binding doc.
> patch21 is add StarFive JH7110 Soc PCIe codes.
> patch22 is Starfive dts config
>
> This patchset is base on v6.6-rc5
>
Hi Kzysztof(K.W)
Could you please take time to review this series patches? Thanks.
Hi Conor
The patch 4- 6 is split from previous version patch. You have added your review tag to that patch.
May I add your review tag to patch 4 -6 ?
And linux-riscv do NOT run compile test to this patch set.
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