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Message-ID: <258a5d1b-46b2-4f79-89cf-157d5bf89f15@kernel.org>
Date: Tue, 17 Oct 2023 17:31:07 +0900
From: Chanwoo Choi <chanwoo@...nel.org>
To: Sascha Hauer <s.hauer@...gutronix.de>
Cc: linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, Heiko Stuebner <heiko@...ech.de>,
Kyungmin Park <kyungmin.park@...sung.com>,
MyungJoo Ham <myungjoo.ham@...sung.com>,
Will Deacon <will@...nel.org>,
Mark Rutland <mark.rutland@....com>, kernel@...gutronix.de,
Michael Riesch <michael.riesch@...fvision.net>,
Robin Murphy <robin.murphy@....com>,
Vincent Legoll <vincent.legoll@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
Sebastian Reichel <sebastian.reichel@...labora.com>
Subject: Re: [PATCH v7 10/26] PM / devfreq: rockchip-dfi: Add RK3568 support
On 23. 10. 16. 20:34, Sascha Hauer wrote:
> On Sat, Oct 07, 2023 at 03:17:14AM +0900, Chanwoo Choi wrote:
>> On 23. 7. 4. 18:32, Sascha Hauer wrote:
>>> This adds RK3568 support to the DFI driver. Only iniitialization
>>> differs from the currently supported RK3399.
>>>
>>> Signed-off-by: Sascha Hauer <s.hauer@...gutronix.de>
>>> ---
>>> drivers/devfreq/event/rockchip-dfi.c | 21 +++++++++++++++++++++
>>> include/soc/rockchip/rk3568_grf.h | 12 ++++++++++++
>>> 2 files changed, 33 insertions(+)
>>> create mode 100644 include/soc/rockchip/rk3568_grf.h
>>>
>>> diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
>>> index 6b3ef97b3be09..261d112580c9e 100644
>>> --- a/drivers/devfreq/event/rockchip-dfi.c
>>> +++ b/drivers/devfreq/event/rockchip-dfi.c
>>> @@ -23,6 +23,7 @@
>>>
>>> #include <soc/rockchip/rockchip_grf.h>
>>> #include <soc/rockchip/rk3399_grf.h>
>>> +#include <soc/rockchip/rk3568_grf.h>
>>>
>>> #define DMC_MAX_CHANNELS 2
>>>
>>> @@ -209,10 +210,30 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
>>> return 0;
>>> };
>>>
>>> +static int rk3568_dfi_init(struct rockchip_dfi *dfi)
>>> +{
>>> + struct regmap *regmap_pmu = dfi->regmap_pmu;
>>> + u32 reg2, reg3;
>>> +
>>> + regmap_read(regmap_pmu, RK3568_PMUGRF_OS_REG2, ®2);
>>> + regmap_read(regmap_pmu, RK3568_PMUGRF_OS_REG3, ®3);
>>> +
>>> + dfi->ddr_type = FIELD_GET(RK3568_PMUGRF_OS_REG2_DRAMTYPE_INFO, reg2);
>
> The ddr_type is 5 bits wide. The lower three bits are here.
>
>>> +
>>> + if (FIELD_GET(RK3568_PMUGRF_OS_REG3_SYSREG_VERSION, reg3) >= 0x3)
>>> + dfi->ddr_type |= FIELD_GET(RK3568_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3, reg3) << 3;
>
> The upper two bits are here, hence we need to shift the value above the
> lower three bits.
>
>>
>> There are no reason of why shifting the '3'.
>> Could you add the comment about '3' or add the constant definition '3'?
>
> I don't think adding a constant makes sense. I'll add a comment making
> it more clear what happens.
It is enough to add the comment. Thanks.
>
>>
>>> +
>>> + dfi->channel_mask = 1;
>>
>> nitpick.
>> On other rkXXXX_dfi_init, use GENMASK() to initialize 'dfi->channel_mask'.
>> In order to keep the consistency, it is better to use BIT() macro as following:
>> dfi->channel_mask = BIT(0);
>
> Ok, will do.
Thanks.
>
> Sascha
>
--
Best Regards,
Samsung Electronics
Chanwoo Choi
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