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Message-ID: <44b9a917-c8e1-4166-b31a-b094eb762d2d@arm.com>
Date: Tue, 17 Oct 2023 11:06:17 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Bagas Sanjaya <bagasdotme@...il.com>,
Linux CoreSight <coresight@...ts.linaro.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux Documentation <linux-doc@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux Next Mailing List <linux-next@...r.kernel.org>
Cc: Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@....com>,
Tao Zhang <quic_taozha@...cinc.com>,
Stephen Rothwell <sfr@...b.auug.org.au>
Subject: Re: [PATCH] Documentation: ABI: coresight-tpdm: Fix Bit[3]
description indentation
On 17/10/2023 10:56, Bagas Sanjaya wrote:
> Stephen Rothwell reported htmldocs warnings when merging coresight tree:
>
> Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm:48: ERROR: Unexpected indentation.
> Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm:48: WARNING: Block quote ends without a blank line; unexpected unindent.
>
> Fix indentation alignment for Bit[3] list entry in dsb_mode description to
> silence above warnings.
>
> Fixes: 535d80d3c10fff ("coresight-tpdm: Add node to set dsb programming mode")
> Reported-by: Stephen Rothwell <sfr@...b.auug.org.au>
> Closes: https://lore.kernel.org/linux-next/20231017143324.75387a21@canb.auug.org.au/
> Signed-off-by: Bagas Sanjaya <bagasdotme@...il.com>
> ---
> Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> index f07218e788439d..4dd49b159543b6 100644
> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> @@ -54,8 +54,8 @@ Description:
> Accepts the value needs to be greater than 0. What data
> bits do is listed below.
> Bit[0:1] : Test mode control bit for choosing the inputs.
> - Bit[3] : Set to 0 for low performance mode.
> - Set to 1 for high performance mode.
> + Bit[3] : Set to 0 for low performance mode. Set to 1 for high
> + performance mode.
> Bit[4:8] : Select byte lane for high performance mode.
>
> What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
>
> base-commit: 90a7371cb08d7e542fa4f283c881973bba09f23b
Thanks, confirmed the patch to fix the issue. I have queued this to next.
https://git.kernel.org/coresight/c/845333e5f0f3
Thanks
Suzuki
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