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Message-ID: <CALs-HsteDO0PvAKKQje7wU0f4z8w2V3f7WiHh5+LvQeVaSua1w@mail.gmail.com>
Date: Wed, 18 Oct 2023 10:45:06 -0700
From: Evan Green <evan@...osinc.com>
To: Conor Dooley <conor@...nel.org>
Cc: Clément Léger <cleger@...osinc.com>,
linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
Palmer Dabbelt <palmer@...osinc.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Albert Ou <aou@...s.berkeley.edu>,
Jonathan Corbet <corbet@....net>,
Andrew Jones <ajones@...tanamicro.com>,
Samuel Ortiz <sameo@...osinc.com>
Subject: Re: [PATCH v2 01/19] riscv: hwprobe: factorize hwprobe ISA extension reporting
On Wed, Oct 18, 2023 at 10:37 AM Conor Dooley <conor@...nel.org> wrote:
>
> On Wed, Oct 18, 2023 at 06:33:34PM +0100, Conor Dooley wrote:
> > On Wed, Oct 18, 2023 at 10:24:15AM -0700, Evan Green wrote:
> > > On Tue, Oct 17, 2023 at 6:15 AM Clément Léger <cleger@...osinc.com> wrote:
> > > >
> > > > Factorize ISA extension reporting by using a macro rather than
> > > > copy/pasting extension names. This will allow adding new extensions more
> > > > easily.
> > > >
> > > > Signed-off-by: Clément Léger <cleger@...osinc.com>
> > > > ---
> > > > arch/riscv/kernel/sys_riscv.c | 32 ++++++++++++++++++--------------
> > > > 1 file changed, 18 insertions(+), 14 deletions(-)
> > > >
> > > > diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
> > > > index 473159b5f303..e207874e686e 100644
> > > > --- a/arch/riscv/kernel/sys_riscv.c
> > > > +++ b/arch/riscv/kernel/sys_riscv.c
> > > > @@ -145,20 +145,24 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
> > > > for_each_cpu(cpu, cpus) {
> > > > struct riscv_isainfo *isainfo = &hart_isa[cpu];
> > > >
> > > > - if (riscv_isa_extension_available(isainfo->isa, ZBA))
> > > > - pair->value |= RISCV_HWPROBE_EXT_ZBA;
> > > > - else
> > > > - missing |= RISCV_HWPROBE_EXT_ZBA;
> > > > -
> > > > - if (riscv_isa_extension_available(isainfo->isa, ZBB))
> > > > - pair->value |= RISCV_HWPROBE_EXT_ZBB;
> > > > - else
> > > > - missing |= RISCV_HWPROBE_EXT_ZBB;
> > > > -
> > > > - if (riscv_isa_extension_available(isainfo->isa, ZBS))
> > > > - pair->value |= RISCV_HWPROBE_EXT_ZBS;
> > > > - else
> > > > - missing |= RISCV_HWPROBE_EXT_ZBS;
> > > > +#define CHECK_ISA_EXT(__ext) \
> > > > + do { \
> > > > + if (riscv_isa_extension_available(isainfo->isa, __ext)) \
> > > > + pair->value |= RISCV_HWPROBE_EXT_##__ext; \
> > > > + else \
> > > > + missing |= RISCV_HWPROBE_EXT_##__ext; \
> > > > + } while (false)
> > > > +
> > > > + /*
> > > > + * Only use CHECK_ISA_EXT() for extensions which can be exposed
> > > > + * to userspace, regardless of the kernel's configuration, as no
> > > > + * other checks, besides presence in the hart_isa bitmap, are
> > > > + * made.
> > >
> > > This comment alludes to a dangerous trap, but I'm having trouble
> > > understanding what it is.
> >
> > You cannot, for example, use this for communicating the presence of F or
> > D, since they require a config option to be set before their use is
> > safe.
>
> Funnily enough, this comment is immediately contradicted by the vector
> subset extensions, where these CHECK_ISA_EXT() macros are used wrapped
> in has_vector(). The code looks valid to me, since has_vector() contains
> the Kconfig check, but does fly in the face of this comment.
Ohh, got it. The word "can" is doing a lot of heavy lifting in that
comment. So maybe something like: "This macro performs little in the
way of extension-specific kernel readiness checks. It's assumed other
gating factors like required Kconfig settings have already been
confirmed to support exposing the given extension to usermode". ...
But, you know, make it sparkle.
-Evan
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