linux-kernel - Re: [PATCH] coresight: etm4x: Enable ETE device accessed via MMIO

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <206d5b79-dcd8-05b7-86c8-d6fb5790439e@linux.alibaba.com>
Date:   Wed, 18 Oct 2023 17:30:47 +0800
From:   Ruidong Tian <tianruidong@...ux.alibaba.com>
To:     Suzuki K Poulose <suzuki.poulose@....com>,
        linux-kernel@...r.kernel.org
Cc:     james.clark@....com, coresight@...ts.linaro.org,
        mike.leach@...aro.org, alexander.shishkin@...ux.intel.com,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] coresight: etm4x: Enable ETE device accessed via MMIO

Hi Suzuki,

Now ETM4X driver use MMIO or system instruction depends on this check in 
function etm4_init_csdev_access:

         if (drvdata->base)
                 return etm4_init_iomem_access(drvdata, csa);

This check always true if firmware provides a address range in ACPI
table of ETE, and as a result, the ETE device in this case cannot be
successfully probed.

I think OS should be compatible with this situation, no matter firmware
how to organize ETE information in ACPI table. How do you feel about
it?

Thank you

Ruidong Tian
在 2023/10/18 16:28, Suzuki K Poulose 写道:
> On 18/10/2023 08:05, Ruidong Tian wrote:
>> The ETM4X driver now assume that all ETE as CPU system instructions
>> accessed device, in fact the ETE device on some machines also accessed
>> via MMIO.
>>
>> Signed-off-by: Ruidong Tian <tianruidong@...ux.alibaba.com>
>
> Why are we going backwards to MMIO from system instructions ? Is it 
> because of an "unfriendly" hypervisor preventing access ?
>
> As such, without a sufficiently acceptable explanation, I am reluctant
> to make this change
>
> Suzuki
>
>> ---
>>   drivers/hwtracing/coresight/coresight-etm4x-core.c | 5 +++--
>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c 
>> b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> index 285539104bcc..ad298c9cc87e 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> @@ -1103,8 +1103,9 @@ static bool etm4_init_iomem_access(struct 
>> etmv4_drvdata *drvdata,
>>        * with MMIO. But we cannot touch the OSLK until we are
>>        * sure this is an ETM. So rely only on the TRCDEVARCH.
>>        */
>> -    if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH) {
>> -        pr_warn_once("TRCDEVARCH doesn't match ETMv4 architecture\n");
>> +    if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH &&
>> +        (devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETE_ARCH) {
>> +        pr_warn_once("TRCDEVARCH doesn't match ETMv4/ETE 
>> architecture\n");
>>           return false;
>>       }