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Message-ID: <IA1PR20MB49538F60A390CA74EF1D16A2BBD5A@IA1PR20MB4953.namprd20.prod.outlook.com>
Date: Wed, 18 Oct 2023 19:30:52 +0800
From: Inochi Amaoto <inochiama@...look.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Chao Wei <chao.wei@...hgo.com>,
Chen Wang <unicorn_wang@...look.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Anup Patel <anup@...infault.org>
Cc: Inochi Amaoto <inochiama@...look.com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: [PATCH v3 0/8] Add Huashan Pi board support
Huashan Pi board is an embedded development platform based on the
CV1812H chip. Add minimal device tree files for this board.
Currently, it can boot to a basic shell.
NOTE: this series is based on the Jisheng's Milk-V Duo patch.
Link: https://en.sophgo.com/product/introduce/huashan.html
Link: https://en.sophgo.com/product/introduce/cv181xH.html
Link: https://lore.kernel.org/linux-riscv/20231006121449.721-1-jszhang@kernel.org/
Changed from v2:
1. use dt override to save code.
2. code cleanup.
Changed from v1:
1. split the patch into several patch and refactor them.
Inochi Amaoto (8):
dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic
dt-bindings: timer: Add SOPHGO CV1812H clint
dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles
riscv: dts: sophgo: Rename cv1800b device tree file
riscv: dts: sophgo: Separate compatible specific for cv1800b soc
riscv: dts: sophgo: cv18xx: Add gpio devices
riscv: dts: sophgo: add initial CV1812H SoC device tree
riscv: dts: sophgo: add Huashan Pi board device tree
.../sifive,plic-1.0.0.yaml | 1 +
.../devicetree/bindings/riscv/sophgo.yaml | 4 +
.../bindings/timer/sifive,clint.yaml | 1 +
arch/riscv/boot/dts/sophgo/Makefile | 1 +
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 119 +----------
.../boot/dts/sophgo/cv1812h-huashan-pi.dts | 48 +++++
arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 24 +++
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 193 ++++++++++++++++++
8 files changed, 279 insertions(+), 112 deletions(-)
create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi
create mode 100644 arch/riscv/boot/dts/sophgo/cv18xx.dtsi
--
2.42.0
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