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Message-ID: <CAA8EJpqfOjGp+FYCxfkFukvZ+bRFytvSFO+nvmMBn6heNpRraA@mail.gmail.com>
Date:   Thu, 19 Oct 2023 17:08:08 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Varadarajan Narayanan <quic_varada@...cinc.com>
Cc:     agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
        rafael@...nel.org, viresh.kumar@...aro.org, ilia.lin@...nel.org,
        sivaprak@...eaurora.org, quic_kathirav@...cinc.com,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-pm@...r.kernel.org
Subject: Re: [PATCH v4 6/9] cpufreq: qti: Enable cpufreq for ipq53xx

On Thu, 19 Oct 2023 at 11:43, Varadarajan Narayanan
<quic_varada@...cinc.com> wrote:
>
> IPQ53xx have different OPPs available for the CPU based on
> SoC variant. This can be determined through use of an eFuse
> register present in the silicon.
>
> Added support for ipq53xx on nvmem driver which helps to
> determine OPPs at runtime based on the eFuse register which
> has the CPU frequency limits. opp-supported-hw dt binding
> can be used to indicate the available OPPs for each limit.
>
> nvmem driver also creates the "cpufreq-dt" platform_device after
> passing the version matching data to the OPP framework so that the
> cpufreq-dt handles the actual cpufreq implementation.
>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
> Signed-off-by: Kathiravan T <quic_kathirav@...cinc.com>
> Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>


-- 
With best wishes
Dmitry

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