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Message-ID: <ZTG-GGQ6Y7ODzq4K@google.com>
Date:   Thu, 19 Oct 2023 16:39:04 -0700
From:   Sean Christopherson <seanjc@...gle.com>
To:     Jinrong Liang <ljr.kernel@...il.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>, Like Xu <likexu@...cent.com>,
        David Matlack <dmatlack@...gle.com>,
        Aaron Lewis <aaronlewis@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jinrong Liang <cloudliang@...cent.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 4/9] KVM: selftests: Test Intel PMU architectural
 events on gp counters

On Mon, Sep 11, 2023, Jinrong Liang wrote:
> +static void test_intel_arch_events(void)
> +{
> +	uint8_t idx;
> +
> +	for (idx = 0; idx < NR_INTEL_ARCH_EVENTS; idx++) {
> +		/*
> +		 * Given the stability of performance event recurrence, only
> +		 * these arch events are currently being tested:
> +		 *
> +		 * - Core cycle event (idx = 0)
> +		 * - Instruction retired event (idx = 1)
> +		 * - Reference cycles event (idx = 2)
> +		 * - Branch instruction retired event (idx = 5)
> +		 */
> +		if (idx > INTEL_ARCH_INSTRUCTIONS_RETIRED &&
> +		    idx != INTEL_ARCH_BRANCHES_RETIRED)
> +			continue;
> +
> +		check_arch_event_is_unavl(idx);

Rather than completely skip the event, just don't check the counter.  That way
the test still verifies that it can program the event, it's only the result that
isn't stable enough to assert on.

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