[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <08cb761b-e6ca-446a-9594-bc5a9733b470@ti.com>
Date: Thu, 19 Oct 2023 13:47:38 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: Serge Semin <fancer.lancer@...il.com>
CC: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <robh@...nel.org>,
<kw@...ux.com>, <linux-pci@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <r-gunasekaran@...com>,
<srk@...com>, <s-vadapalli@...com>
Subject: Re: [PATCH v2] PCI: keystone: Fix ks_pcie_v3_65_add_bus() for AM654x
SoC
Hello Serge,
On 19/10/23 10:07, Siddharth Vadapalli wrote:
>
>
> On 18/10/23 17:45, Serge Semin wrote:
>> On Wed, Oct 18, 2023 at 05:26:53PM +0530, Siddharth Vadapalli wrote:
...
>
> Sure. Thank you for the suggestion. I will leave ks_pcie_ops as-is for the older
> 3.65 controller while adding the ks_pcie_am6_ops without the .add_bus method for
> the newer 4.90 controller. I assume this should be acceptable since the
> pci-keystone.c driver only has two controller versions, namely 3.65a and 4.90a,
> with the new 4.90a controller only applicable to AM654x SoC which is already
> being distinguished in the driver using the is_am6 flag.
>
> In the v3 patch, I will add the following:
>
> static struct pci_ops ks_pcie_am6_ops = {
> .map_bus = dw_pcie_own_conf_map_bus,
> .read = pci_generic_config_read,
> .write = pci_generic_config_write,
> };
>
> and also update ks_pcie_host_init() to the following:
> if(ks_pcie->is_am6)
> pp->bridge->ops = &ks_pcie_am6_ops;
> else
> pp->bridge->ops = &ks_pcie_ops;
>
>>
>> Meanwhile your fix look more like a workaround. The
>> ks_pcie_v3_65_add_bus() function will be still called for the AM6x
>> v4.90 controllers, which based on its semantic would be and will be
>> wrong in any case. So instead of noop-ing the function it would be
>> better to just drop it being called for the new controllers.
>
> Yes, I will drop it for the new 4.90a controller rather than making it a no-op.
I have posted the v3 patch at:
https://lore.kernel.org/r/20231019081330.2975470-1-s-vadapalli@ti.com/
implementing your suggestion of adding a new pci_ops structure.
Please review it and let me know in case of any feedback.
--
Regards,
Siddharth.
Powered by blists - more mailing lists