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Message-ID: <20231019-f3c3768f5e95e747e1457c49@orel>
Date: Thu, 19 Oct 2023 10:27:13 +0200
From: Andrew Jones <ajones@...tanamicro.com>
To: Anup Patel <apatel@...tanamicro.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Atish Patra <atishp@...shpatra.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
Conor Dooley <conor@...nel.org>, kvm@...r.kernel.org,
kvm-riscv@...ts.infradead.org, linux-riscv@...ts.infradead.org,
linux-serial@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 6/8] tty/serial: Add RISC-V SBI debug console based
earlycon
On Thu, Oct 12, 2023 at 10:45:07AM +0530, Anup Patel wrote:
> We extend the existing RISC-V SBI earlycon support to use the new
> RISC-V SBI debug console extension.
>
> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> ---
> drivers/tty/serial/Kconfig | 2 +-
> drivers/tty/serial/earlycon-riscv-sbi.c | 32 +++++++++++++++++++++----
> 2 files changed, 29 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> index bdc568a4ab66..cec46091a716 100644
> --- a/drivers/tty/serial/Kconfig
> +++ b/drivers/tty/serial/Kconfig
> @@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
>
> config SERIAL_EARLYCON_RISCV_SBI
> bool "Early console using RISC-V SBI"
> - depends on RISCV_SBI_V01
> + depends on RISCV_SBI
> select SERIAL_CORE
> select SERIAL_CORE_CONSOLE
> select SERIAL_EARLYCON
> diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
> index 27afb0b74ea7..c21cdef254e7 100644
> --- a/drivers/tty/serial/earlycon-riscv-sbi.c
> +++ b/drivers/tty/serial/earlycon-riscv-sbi.c
> @@ -15,17 +15,41 @@ static void sbi_putc(struct uart_port *port, unsigned char c)
> sbi_console_putchar(c);
> }
>
> -static void sbi_console_write(struct console *con,
> - const char *s, unsigned n)
> +static void sbi_0_1_console_write(struct console *con,
> + const char *s, unsigned int n)
> {
> struct earlycon_device *dev = con->data;
> uart_console_write(&dev->port, s, n, sbi_putc);
> }
>
> +static void sbi_dbcn_console_write(struct console *con,
> + const char *s, unsigned int n)
> +{
> + phys_addr_t pa = __pa(s);
> +
> + if (IS_ENABLED(CONFIG_32BIT))
> + sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> + n, lower_32_bits(pa), upper_32_bits(pa), 0, 0, 0);
> + else
> + sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> + n, pa, 0, 0, 0, 0);
> +}
> +
> static int __init early_sbi_setup(struct earlycon_device *device,
> const char *opt)
> {
> - device->con->write = sbi_console_write;
> - return 0;
> + int ret = 0;
> +
> + if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
> + (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
> + device->con->write = sbi_dbcn_console_write;
> + } else {
> + if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
> + device->con->write = sbi_0_1_console_write;
> + else
> + ret = -ENODEV;
> + }
> +
> + return ret;
> }
> EARLYCON_DECLARE(sbi, early_sbi_setup);
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
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