linux-kernel - Re: [PATCH] iommu/amd: Do not flush IRTE when only updating isRun and destination fields

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Message-ID: <d0731c73-b2bb-972f-a728-f63273c4d5ab@amd.com>
Date:   Thu, 19 Oct 2023 16:11:43 +0700
From:   "Suthikulpanit, Suravee" <suravee.suthikulpanit@....com>
To:     Maxim Levitsky <mlevitsk@...hat.com>, linux-kernel@...r.kernel.org,
        iommu@...ts.linux.dev
Cc:     joro@...tes.org, seanjc@...gle.com, vasant.hegde@....com,
        jon.grimm@....com, santosh.shukla@....com,
        joao.m.martins@...cle.com, alejandro.j.jimenez@...cle.com,
        boris.ostrovsky@...cle.com
Subject: Re: [PATCH] iommu/amd: Do not flush IRTE when only updating isRun and
 destination fields

Maxim,

On 10/17/2023 10:36 PM, Suthikulpanit, Suravee wrote:
> 
> On 10/17/2023 9:51 PM, Maxim Levitsky wrote:
>> У вт, 2023-10-17 у 09:42 -0500, Suravee Suthikulpanit пише:
>>> According to the recent update in the AMD IOMMU spec [1], the IsRun and
>>> Destination fields of the Interrupt Remapping Table Entry (IRTE) are not
>>> cached by the IOMMU hardware.
>> Is that true for all AMD hardware that supports AVIC? E.g Zen1/Zen2 
>> hardware?
> 
> This is true for all AVIC/x2AVIC-capable IOMMU hardware in the past.
> 
>> Is there a chance that this will cause a similar errata to the is_running
>> errata that Zen2 cpus have?
> 
> Please let me check on this and get back.

Just to be sure, could you please tell me which errata number are you 
referring to here?

Thanks,
Suravee