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Message-ID: <20231019110917.GI36211@noisy.programming.kicks-ass.net>
Date: Thu, 19 Oct 2023 13:09:17 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: kan.liang@...ux.intel.com
Cc: mingo@...hat.com, acme@...nel.org, linux-kernel@...r.kernel.org,
mark.rutland@....com, alexander.shishkin@...ux.intel.com,
jolsa@...nel.org, namhyung@...nel.org, irogers@...gle.com,
adrian.hunter@...el.com, ak@...ux.intel.com, eranian@...gle.com,
alexey.v.bayduraev@...ux.intel.com, tinghao.zhang@...el.com
Subject: Re: [PATCH V4 4/7] perf/x86/intel: Support LBR event logging
On Wed, Oct 04, 2023 at 11:40:41AM -0700, kan.liang@...ux.intel.com wrote:
> @@ -3905,6 +3915,44 @@ static int intel_pmu_hw_config(struct perf_event *event)
> if (needs_branch_stack(event) && is_sampling_event(event))
> event->hw.flags |= PERF_X86_EVENT_NEEDS_BRANCH_STACK;
>
> + if (branch_sample_counters(event)) {
> + struct perf_event *leader, *sibling;
> +
> + if (!(x86_pmu.flags & PMU_FL_LBR_EVENT) ||
> + (event->attr.config & ~INTEL_ARCH_EVENT_MASK))
> + return -EINVAL;
> +
> + /*
> + * The event logging is not supported in the call stack mode
> + * yet, since we cannot simply flush the LBR during e.g.,
> + * multiplexing. Also, there is no obvious usage with the call
> + * stack mode. Simply forbids it for now.
> + *
> + * If any events in the group enable the LBR event logging
> + * feature, the group is treated as a LBR event logging group,
> + * which requires the extra space to store the counters.
> + */
> + leader = event->group_leader;
> + if (branch_sample_call_stack(leader))
> + return -EINVAL;
> + leader->hw.flags |= PERF_X86_EVENT_BRANCH_COUNTERS;
(superfluous whitespace before operator)
> +
> + for_each_sibling_event(sibling, leader) {
> + if (branch_sample_call_stack(sibling))
> + return -EINVAL;
> + }
> +
> + /*
> + * Only applying the PERF_SAMPLE_BRANCH_COUNTERS doesn't
> + * require any branch stack setup.
> + * Clear the bit to avoid unnecessary branch stack setup.
> + */
> + if (0 == (event->attr.branch_sample_type &
> + ~(PERF_SAMPLE_BRANCH_PLM_ALL |
> + PERF_SAMPLE_BRANCH_COUNTERS)))
> + event->hw.flags &= ~PERF_X86_EVENT_NEEDS_BRANCH_STACK;
> + }
Does this / should this check the number of group members vs supported
number of lbr counters?
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