linux-kernel - Re: [PATCH v3 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC

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Date:   Thu, 19 Oct 2023 14:48:17 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Mrinmay Sarkar <quic_msarkar@...cinc.com>, agross@...nel.org,
        andersson@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, konrad.dybcio@...aro.org, mani@...nel.org
Cc:     quic_shazhuss@...cinc.com, quic_nitegupt@...cinc.com,
        quic_ramkri@...cinc.com, quic_nayiluri@...cinc.com,
        dmitry.baryshkov@...aro.org, robh@...nel.org,
        quic_krichai@...cinc.com, quic_vbadigan@...cinc.com,
        quic_parass@...cinc.com, Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Kishon Vijay Abraham I <kishon@...nel.org>,
        Vinod Koul <vkoul@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, mhi@...ts.linux.dev,
        linux-phy@...ts.infradead.org
Subject: Re: [PATCH v3 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P
 SoC

On 19/10/2023 13:37, Mrinmay Sarkar wrote:
> Add devicetree bindings support for SA8775P SoC. It has DMA register
> space and dma interrupt to support HDMA.
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>
> ---
>  .../devicetree/bindings/pci/qcom,pcie-ep.yaml      | 44 +++++++++++++++++++++-
>  1 file changed, 42 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> index a223ce0..7485248 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> @@ -13,6 +13,7 @@ properties:
>    compatible:
>      oneOf:
>        - enum:
> +          - qcom,sa8775p-pcie-ep
>            - qcom,sdx55-pcie-ep
>            - qcom,sm8450-pcie-ep
>        - items:
> @@ -20,6 +21,7 @@ properties:
>            - const: qcom,sdx55-pcie-ep
>  
>    reg:
> +    minItems: 6
>      items:
>        - description: Qualcomm-specific PARF configuration registers
>        - description: DesignWare PCIe registers
> @@ -27,8 +29,10 @@ properties:
>        - description: Address Translation Unit (ATU) registers
>        - description: Memory region used to map remote RC address space
>        - description: BAR memory region
> +      - description: DMA register space

You need to constrain IO space in all other variants.

>  
>    reg-names:
> +    minItems: 6
>      items:
>        - const: parf
>        - const: dbi
> @@ -36,13 +40,14 @@ properties:
>        - const: atu
>        - const: addr_space
>        - const: mmio
> +      - const: dma
>  
>    clocks:
> -    minItems: 7
> +    minItems: 5
>      maxItems: 8
>  
>    clock-names:
> -    minItems: 7
> +    minItems: 5
>      maxItems: 8
>  
>    qcom,perst-regs:
> @@ -57,14 +62,18 @@ properties:
>            - description: Perst separation enable offset
>  
>    interrupts:
> +    minItems: 2
>      items:
>        - description: PCIe Global interrupt
>        - description: PCIe Doorbell interrupt
> +      - description: DMA interrupt
>  
>    interrupt-names:
> +    minItems: 2
>      items:
>        - const: global
>        - const: doorbell
> +      - const: dma

You need to constrain interrupts in all other variants.

>  
>    reset-gpios:
>      description: GPIO used as PERST# input signal
> @@ -173,6 +182,37 @@ allOf:
>              - const: ddrss_sf_tbu
>              - const: aggre_noc_axi
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,sa8775p-pcie-ep
> +    then:
> +      properties:
> +        reg:
> +          minItems: 7

As well:
maxItems: 7
Otherwise any future update will for sure miss this and relax the reg.

> +        reg-names:
> +          minItems: 7

Ditto

> +        clocks:
> +          items:
> +            - description: PCIe Auxiliary clock
> +            - description: PCIe CFG AHB clock
> +            - description: PCIe Master AXI clock
> +            - description: PCIe Slave AXI clock
> +            - description: PCIe Slave Q2A AXI clock
> +        clock-names:
> +          items:
> +            - const: aux
> +            - const: cfg
> +            - const: bus_master
> +            - const: bus_slave
> +            - const: slave_q2a
> +        interrupts:
> +          minItems: 3

Ditto

> +        interrupt-names:
> +          minItems: 3

Ditto

> +
>  unevaluatedProperties: false
>  
>  examples:

Best regards,
Krzysztof