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Message-Id: <20231019022300.1588041-1-aford173@gmail.com>
Date: Wed, 18 Oct 2023 21:23:00 -0500
From: Adam Ford <aford173@...il.com>
To: linux-arm-kernel@...ts.infradead.org
Cc: l.stach@...gutronix.de, aford@...conembedded.com,
Adam Ford <aford173@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: imx8mp: Add NPU Node
The NPU is based on the Vivante GC8000 and it enumerates as
etnaviv-gpu 38500000.npu: model: GC8000, revision: 8002
Signed-off-by: Adam Ford <aford173@...il.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index c9a610ba4836..1ef8d17726ac 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -2012,6 +2012,25 @@ vpumix_blk_ctrl: blk-ctrl@...30000 {
interconnect-names = "g1", "g2", "vc8000e";
};
+ npu: npu@...00000 {
+ compatible = "vivante,gc";
+ reg = <0x38500000 0x20000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_NPU_ROOT>,
+ <&clk IMX8MP_CLK_NPU_ROOT>,
+ <&clk IMX8MP_CLK_ML_AXI>,
+ <&clk IMX8MP_CLK_ML_AHB>;
+ clock-names = "core", "shader", "bus", "reg";
+ assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
+ <&clk IMX8MP_CLK_ML_AXI>,
+ <&clk IMX8MP_CLK_ML_AHB>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
+ <&clk IMX8MP_SYS_PLL1_800M>,
+ <&clk IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <1000000000>, <800000000>, <400000000>;
+ power-domains = <&pgc_mlmix>;
+ };
+
gic: interrupt-controller@...00000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>,
--
2.40.1
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