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Message-ID: <20231019135940.3658613-1-peterlin@andestech.com>
Date: Thu, 19 Oct 2023 21:59:40 +0800
From: Yu Chien Peter Lin <peterlin@...estech.com>
To: <atishp@...shpatra.org>, <anup@...infault.org>, <will@...nel.org>,
<mark.rutland@....com>, <paul.walmsley@...ive.com>,
<palmer@...belt.com>, <aou@...s.berkeley.edu>,
<linux-riscv@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
CC: <prabhakar.mahadev-lad.rj@...renesas.com>, <tim609@...estech.com>,
<dylan@...estech.com>, <locus84@...estech.com>,
<dminus@...estech.com>,
"Yu Chien Peter Lin" <peterlin@...estech.com>
Subject: [PATCH v2 06/10] perf: RISC-V: Eliminate redundant IRQ enable/disable operations
The IRQ enable/disable operations are already performed by the
IRQ chip functions riscv_intc_irq_unmask()/riscv_intc_irq_mask()
during enable_percpu_irq()/disable_percpu_irq(). We can just do
it once.
Signed-off-by: Yu Chien Peter Lin <peterlin@...estech.com>
---
This patch allows us to drop unnecessary ALT_SBI_PMU_OVF_{DISABLE,ENABLE}
in the last PATCH3 [1].
[1] https://patchwork.kernel.org/project/linux-riscv/patch/20230907021635.1002738-4-peterlin@andestech.com/
Changes v1 -> v2:
- New patch
---
drivers/perf/riscv_pmu_sbi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 96c7f670c8f0..f340db9ce1e2 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -778,7 +778,6 @@ static int pmu_sbi_starting_cpu(unsigned int cpu, struct hlist_node *node)
if (riscv_pmu_use_irq) {
cpu_hw_evt->irq = riscv_pmu_irq;
csr_clear(CSR_IP, BIT(riscv_pmu_irq_num));
- csr_set(CSR_IE, BIT(riscv_pmu_irq_num));
enable_percpu_irq(riscv_pmu_irq, IRQ_TYPE_NONE);
}
@@ -789,7 +788,6 @@ static int pmu_sbi_dying_cpu(unsigned int cpu, struct hlist_node *node)
{
if (riscv_pmu_use_irq) {
disable_percpu_irq(riscv_pmu_irq);
- csr_clear(CSR_IE, BIT(riscv_pmu_irq_num));
}
/* Disable all counters access for user mode now */
--
2.34.1
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