Message-ID: <fb5cda1a-011e-43ec-9ac3-4bf4ff81a49b@microchip.com>
Date:   Fri, 20 Oct 2023 03:40:39 +0000
From:   <Hari.PrasathGE@...rochip.com>
To:     <Manikandan.M@...rochip.com>, <sam@...nborg.org>,
        <bbrezillon@...nel.org>, <airlied@...il.com>, <daniel@...ll.ch>,
        <Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
        <lee@...nel.org>, <dri-devel@...ts.freedesktop.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
CC:     <Balamanikandan.Gunasundar@...rochip.com>,
        <Durai.ManickamKR@...rochip.com>, <Nayabbasha.Sayed@...rochip.com>,
        <Dharma.B@...rochip.com>, <Varshini.Rajendran@...rochip.com>,
        <Balakrishnan.S@...rochip.com>
Subject: Re: [PATCH v7 1/7] drm: atmel-hlcdc: add flag and driver ops to
 differentiate XLCDC and HLCDC IP

Dear Community Members,

I hope this message finds you well. I'm writing to kindly remind you 
about this patch series my colleague submitted for review.

I understand that everyone is busy,I would greatly appreciate your 
feedback. I thank everyone who participated in the review of the 
previous revisions.

I strongly believe your feedback would help improve the quality of the 
code. Thanks in advance.

Regards,
Hari

On 05/10/23 2:59 pm, Manikandan Muralidharan wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Add is_xlcdc flag and LCD IP specific ops in driver data to differentiate
> XLCDC and HLCDC code within the atmel-hlcdc driver files.
> 
> Signed-off-by: Manikandan Muralidharan <manikandan.m@...rochip.com>
> ---
>   drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 37 ++++++++++++++++++++
>   1 file changed, 37 insertions(+)
> 
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> index 5b5c774e0edf..d5e01ff8c7f9 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> @@ -177,6 +177,9 @@ struct atmel_hlcdc_layer_cfg_layout {
>          int csc;
>   };
> 
> +struct atmel_hlcdc_plane_state;
> +struct atmel_hlcdc_dc;
> +
>   /**
>    * Atmel HLCDC DMA descriptor structure
>    *
> @@ -288,6 +291,36 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer)
>          return container_of(layer, struct atmel_hlcdc_plane, layer);
>   }
> 
> +/**
> + * struct atmel_lcdc_dc_ops - describes atmel_lcdc ops group
> + * to differentiate HLCDC and XLCDC IP code support.
> + * @plane_setup_scaler: update the vertical and horizontal scaling factors
> + * @update_lcdc_buffers: update the each LCDC layers DMA registers.
> + * @lcdc_atomic_disable: disable LCDC interrupts and layers
> + * @lcdc_update_general_settings: update each LCDC layers general
> + * confiugration register.
> + * @lcdc_atomic_update: enable the LCDC layers and interrupts.
> + * @lcdc_csc_init: update the color space conversion co-efficient of
> + * High-end overlay register.
> + * @lcdc_irq_dbg: to raise alert incase of interrupt overrun in any LCDC layer.
> + */
> +struct atmel_lcdc_dc_ops {
> +       void (*plane_setup_scaler)(struct atmel_hlcdc_plane *plane,
> +                                  struct atmel_hlcdc_plane_state *state);
> +       void (*update_lcdc_buffers)(struct atmel_hlcdc_plane *plane,
> +                                   struct atmel_hlcdc_plane_state *state,
> +                                   u32 sr, int i);
> +       void (*lcdc_atomic_disable)(struct atmel_hlcdc_plane *plane);
> +       void (*lcdc_update_general_settings)(struct atmel_hlcdc_plane *plane,
> +                                            struct atmel_hlcdc_plane_state *state);
> +       void (*lcdc_atomic_update)(struct atmel_hlcdc_plane *plane,
> +                                  struct atmel_hlcdc_dc *dc);
> +       void (*lcdc_csc_init)(struct atmel_hlcdc_plane *plane,
> +                             const struct atmel_hlcdc_layer_desc *desc);
> +       void (*lcdc_irq_dbg)(struct atmel_hlcdc_plane *plane,
> +                            const struct atmel_hlcdc_layer_desc *desc);
> +};
> +
>   /**
>    * Atmel HLCDC Display Controller description structure.
>    *
> @@ -304,8 +337,10 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer)
>    * @conflicting_output_formats: true if RGBXXX output formats conflict with
>    *                             each other.
>    * @fixed_clksrc: true if clock source is fixed
> + * @is_xlcdc: true if XLCDC IP is supported
>    * @layers: a layer description table describing available layers
>    * @nlayers: layer description table size
> + * @ops: atmel lcdc dc ops
>    */
>   struct atmel_hlcdc_dc_desc {
>          int min_width;
> @@ -317,8 +352,10 @@ struct atmel_hlcdc_dc_desc {
>          int max_hpw;
>          bool conflicting_output_formats;
>          bool fixed_clksrc;
> +       bool is_xlcdc;
>          const struct atmel_hlcdc_layer_desc *layers;
>          int nlayers;
> +       const struct atmel_lcdc_dc_ops *ops;
>   };
> 
>   /**
> --
> 2.25.1
> 
> 
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