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Message-ID: <20231020220727.444o7ghclpyp4l4q@synopsys.com>
Date:   Fri, 20 Oct 2023 22:07:34 +0000
From:   Thinh Nguyen <Thinh.Nguyen@...opsys.com>
To:     Bjorn Andersson <quic_bjorande@...cinc.com>
CC:     Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Wesley Cheng <quic_wcheng@...cinc.com>,
        Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
        Felipe Balbi <balbi@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
        "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Johan Hovold <johan@...nel.org>,
        Krishna Kurapati PSSNV <quic_kriskura@...cinc.com>
Subject: Re: [PATCH 05/12] usb: dwc3: Override end of dwc3 memory resource

On Mon, Oct 16, 2023, Bjorn Andersson wrote:
> In the case that the dwc3 core driver is instantiated from the same
> memory resource information as the glue driver, the dwc_res memory
> region will overlap with the memory region already mapped by the glue.
> 
> As the DWC3 core driver already does math on the passed memory region to
> exclude the XHCI region, also adjust the end address, to avoid having to
> pass an adjusted region from the glue explicitly.
> 
> Signed-off-by: Bjorn Andersson <quic_bjorande@...cinc.com>
> ---
>  drivers/usb/dwc3/core.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 71e376bebb16..5d86b803fab0 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -1908,6 +1908,7 @@ struct dwc3 *dwc3_probe(struct platform_device *pdev)
>  	 */
>  	dwc_res = *res;
>  	dwc_res.start += DWC3_GLOBALS_REGS_START;
> +	dwc_res.end = res->start + DWC3_OTG_REGS_END;

DWC3_OTG_REGS_END shouldn't really be the end. What offset does qcom
start overlapping?

Can the end be 0xda00 for now? (This can change)

BR,
Thinh

>  
>  	if (dev->of_node) {
>  		struct device_node *parent = of_get_parent(dev->of_node);
> @@ -1915,6 +1916,7 @@ struct dwc3 *dwc3_probe(struct platform_device *pdev)
>  		if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) {
>  			dwc_res.start -= DWC3_GLOBALS_REGS_START;
>  			dwc_res.start += DWC3_RTK_RTD_GLOBALS_REGS_START;
> +			dwc_res.end = dwc_res.start + DWC3_OTG_REGS_END;
>  		}
>  
>  		of_node_put(parent);
> 
> -- 
> 2.25.1
> 

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