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Message-Id: <20231020064320.5302-4-manivannan.sadhasivam@linaro.org>
Date: Fri, 20 Oct 2023 12:13:20 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: jingoohan1@...il.com, gustavo.pimentel@...opsys.com,
lpieralisi@...nel.org, robh@...nel.org, kw@...ux.com,
bhelgaas@...gle.com
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, vidyas@...dia.com,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH v6 3/3] PCI: tegra194: Refactor EP initialization completion
From: Vidya Sagar <vidyas@...dia.com>
Instead of doing the initialization complete and notifying it to the EPF
drivers separately, let's call the dw_pcie_ep_init_notify() function that
takes care of both.
Signed-off-by: Vidya Sagar <vidyas@...dia.com>
[mani: modified the commit message]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
---
drivers/pci/controller/dwc/pcie-tegra194.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index a962f2c7794f..a8835287fc3a 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1897,14 +1897,12 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
val = (upper_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK);
dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val);
- ret = dw_pcie_ep_init_complete(ep);
+ ret = dw_pcie_ep_init_notify(ep);
if (ret) {
dev_err(dev, "Failed to complete initialization: %d\n", ret);
goto fail_init_complete;
}
- dw_pcie_ep_init_notify(ep);
-
/* Program the private control to allow sending LTR upstream */
if (pcie->of_data->has_ltr_req_fix) {
val = appl_readl(pcie, APPL_LTR_MSG_2);
--
2.25.1
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