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Message-ID: <20231023183527.GM691768@ziepe.ca>
Date:   Mon, 23 Oct 2023 15:35:27 -0300
From:   Jason Gunthorpe <jgg@...pe.ca>
To:     Tina Zhang <tina.zhang@...el.com>
Cc:     iommu@...ts.linux.dev, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org, David Woodhouse <dwmw2@...radead.org>,
        Lu Baolu <baolu.lu@...ux.intel.com>,
        Joerg Roedel <joro@...tes.org>,
        Kevin Tian <kevin.tian@...el.com>
Subject: Re: [RFC PATCH 06/12] iommu: Add mmu_notifier to sva domain


On Tue, Oct 17, 2023 at 11:20:39AM +0800, Tina Zhang wrote:
> Devices attached to shared virtual addressing (SVA) domain are allowed to
> use the same virtual addresses with processor, and this functionality is
> called shared virtual memory. When shared virtual memory is being used,
> it's the sva domain's responsibility to keep device TLB cache and the CPU
> cache in sync. Hence add mmu_notifier to sva domain.
> 
> Signed-off-by: Tina Zhang <tina.zhang@...el.com>
> ---
>  include/linux/iommu.h | 2 ++
>  1 file changed, 2 insertions(+)

You should look at how arm smmuv3 ended up after I went over it to
make similar changes, I think you should take this patch

https://lore.kernel.org/linux-iommu/20-v1-afbb86647bbd+5-smmuv3_newapi_p2_jgg@nvidia.com/

into this series (maybe drop the arm part)

And copy the same basic structure for how the mmu notifier works.

It would also be nice if alot of the 'if_sva' tests could be avoided,
smmu didn't end up with those..

In the guts of the pasid handling sva shouldn't be special beyond a
different source for the pgd.

Jason

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