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Message-ID: <CAF6AEGuqrm0pssjRDa9DK=NppU4Qq5cPZicbGfxKH2czJmjK2A@mail.gmail.com>
Date: Mon, 23 Oct 2023 13:20:27 -0700
From: Rob Clark <robdclark@...il.com>
To: Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Marijn Suijten <marijn.suijten@...ainline.org>,
Rob Clark <robdclark@...omium.org>,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Abel Vesa <abel.vesa@...aro.org>
Subject: Re: [PATCH] drm/msm/adreno: Drop WARN_ON from patchid lookup for new GPUs
On Mon, Oct 23, 2023 at 12:56 PM Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
>
>
>
> On 10/23/23 21:42, Rob Clark wrote:
> > On Mon, Oct 23, 2023 at 7:29 AM Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
> >>
> >> New GPUs still use the lower 2 bytes of the chip id (in whatever form
> >> it comes) to signify silicon revision. Drop the warning that makes it
> >> sound as if that was unintended.
> >>
> >> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> >> ---
> >> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 -----
> >> 1 file changed, 5 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> >> index 80b3f6312116..9a1ec42155fd 100644
> >> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> >> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> >> @@ -203,11 +203,6 @@ struct adreno_platform_config {
> >>
> >> static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu)
> >> {
> >> - /* It is probably ok to assume legacy "adreno_rev" format
> >> - * for all a6xx devices, but probably best to limit this
> >> - * to older things.
> >> - */
> >> - WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);
> >
> > Maybe just change it to ADRENO_6XX_GEN4?
> That also applies to 700
Then the warn is warning about what it is supposed to ;-)
I guess this is coming from a6xx_gmu_fw_start()? I think we need a
different way to construct the gmu chipid, since the point of this was
to not depend on the low 8b having any particular meaning. Perhaps we
should just get the gmu chipid from the device table.
BR,
-R
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