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Message-Id: <20231023-th1520-mmc-v3-0-abc5e7491166@baylibre.com>
Date: Mon, 23 Oct 2023 14:07:01 -0700
From: Drew Fustini <dfustini@...libre.com>
To: Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Jisheng Zhang <jszhang@...nel.org>,
Adrian Hunter <adrian.hunter@...el.com>,
Guo Ren <guoren@...nel.org>, Fu Wei <wefu@...hat.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Conor Dooley <conor@...nel.org>
Cc: Robert Nelson <robertcnelson@...gleboard.org>,
Jason Kridner <jkridner@...gleboard.org>,
Xi Ruoyao <xry111@...111.site>, Han Gao <gaohan@...as.ac.cn>,
Icenowy Zheng <uwu@...nowy.me>, linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Drew Fustini <dfustini@...libre.com>
Subject: [PATCH v3 0/7] RISC-V: Add MMC support for TH1520 boards
This series adds support for the MMC controller in the T-Head TH1520
SoC, and it enables the eMMC and microSD slot on both the BeagleV
Ahead and the Sipeed LicheePi 4A.
I tested on top of v6.6-rc6 with riscv defconfig. I was able to boot
both the Ahead [1] and LPi4a [2] from eMMC. The following prerequisites
are required:
[PATCH v2] riscv: dts: thead: set dma-noncoherent to soc bus [3]
I pushed a branch [4] with this patch series and the above patch for
those that find a git branch easier to test.
Note: I have only tested eMMC and microSD. I have not yet configured
or tested the mmc controller used for SDIO WiFi yet.
References:
[1] https://gist.github.com/pdp7/7850027e8d256b6fd9cd53080240f0f6
[2] https://gist.github.com/pdp7/fae4637378426723508b679420a0a5a1
[3] https://lore.kernel.org/linux-riscv/20230912072232.2455-1-jszhang@kernel.org/
[4] https://github.com/pdp7/linux/tree/b4/th1520-mmc
Changes in PATCH v3:
- always call th1520_sdhci_set_phy() in th1520_set_uhs_signaling()
and not only when timing is MMC_TIMING_MMC_HS400. This allows the
microSD slot to work as th1520_phy_3_3v_init() is called from
th1520_sdhci_set_phy().
- add mmc1 node for mmc controller connected to the microSD slot
- add enable mmc1 and add properties for microSD on the Ahead and LPi4A
Changes in PATCH v2:
https://lore.kernel.org/r/20231017-th1520-mmc-v2-0-4678c8cc4048@baylibre.com
- make use of BIT(), GENMASK(), FIELD_PREP(), FIELD_GET()
- add EXPORT_SYMBOL_GPL(__sdhci_execute_tuning)
- call th1520_phy_1_8v_init() when FLAG_IO_FIXED_1V8 is set
- set DWCMSHC_CARD_IS_EMMC when mmc caps contains MMC_CAP_NONREMOVABLE
- remove manipulation of AT_CTRL_AT_EN from th1520_set_uhs_signaling()
- remove unneccessary cycle of enabling and disabling AT_CTRL_AT_EN in
th1520_execute_tuning()
- remove th1520_phy_1_8v_init_no_pull()
- remove th1520_phy_3_3v_init_no_pull()
- remove FLAG_PULL_UP_EN from priv->flags
- remove thead,phy-pull-up device tree property
Changes in PACH v1:
https://lore.kernel.org/all/20230921-th1520-mmc-v1-0-49f76c274fb3@baylibre.com/
- ADMA mode now works correctly due to a patch from Jisheng on the list
("riscv: dts: thead: set dma-noncoherent to soc bus") and this commit
from Icenowy that is now merged: 8eb8fe67e2c8 ("riscv: errata: fix
T-Head dcache.cva encoding").
- Expose __sdhci_execute_tuning from sdhci.c so that it can be called
from th1520_execute_tuning()
- Refactor the define macros for all the PHY related registers to make
it easier to understand the bit fields that the code is manipulating
- Replace magic numbers in the PHY register writes with proper defines
- Replace non_removable in dwcmshc_priv with check of mmc_host.caps
- Drop dt prop "thead,io-fixed-1v8" and instead check for existing
properties: "mmc-ddr-1_8v", "mmc-hs200-1_8v", or "mmc-hs400-1_8v"
- Rename dt prop from "thead,pull-up" to "thead,phy-pull-up" and
improve the description in the dt binding
- Replace pull_up_en in dwcmshc_priv with bit field in new flags field
- Create th1520_set_uhs_signaling() and call dwcmshc_set_uhs_signaling()
from it instead of adding th1520 code to dwcmshc_set_uhs_signaling()
- Return -EIO instead of -1 upon errors in th1520_execute_tuning()
Changes in RFC v2:
https://lore.kernel.org/linux-riscv/20230724-th1520-emmc-v2-0-132ed2e2171e@baylibre.com/
- Expand dwcmshc_priv based on driver in the T-Head 5.10 kernel:
delay_line, non_removable, pull_up_en, io_fixed_1v8
- New boolean property "thead,pull-up" indicates phy pull-up config
- New boolean property "thead,io-fixed-1v8" indicates that io voltage
should be set to 1.8V during reset
- Add th1520_phy_1_8v_init() as voltage_switch op
- Add th1520_execute_tuning() as the platform_execute_tuning op
- Added th1520_sdhci_reset() as the .reset op. This function will set
io voltage to 1.8V after calling the standard sdhci_reset() function.
- Modified dwcmshc_set_uhs_signaling() to enable SDHCI_CTRL_VDD_180 when
io_fixed_1v8 is true
- Add many defines for register offsets and settings based on the mmc
support in the T-Head downstream v5.10 kernel
RFC v1 series:
https://lore.kernel.org/r/20230724-th1520-emmc-v1-0-cca1b2533da2@baylibre.com
Signed-off-by: Drew Fustini <dfustini@...libre.com>
---
Drew Fustini (7):
dt-bindings: mmc: sdhci-of-dwcmhsc: Add T-Head TH1520 support
mmc: sdhci: add __sdhci_execute_tuning() to header
mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520
riscv: defconfig: Enable mmc and dma drivers for T-Head TH1520
riscv: dts: thead: Add TH1520 mmc controllers and sdhci clock
riscv: dts: thead: Enable BeagleV Ahead eMMC and microSD
riscv: dts: thead: Enable LicheePi 4A eMMC and microSD
.../bindings/mmc/snps,dwcmshc-sdhci.yaml | 1 +
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 20 ++
.../boot/dts/thead/th1520-lichee-module-4a.dtsi | 20 ++
arch/riscv/boot/dts/thead/th1520.dtsi | 23 ++
arch/riscv/configs/defconfig | 2 +
drivers/mmc/host/sdhci-of-dwcmshc.c | 357 +++++++++++++++++++++
drivers/mmc/host/sdhci.c | 3 +-
drivers/mmc/host/sdhci.h | 1 +
8 files changed, 426 insertions(+), 1 deletion(-)
---
base-commit: f4c03b3d6c4bdafbb7885ccb84b095001eab1b88
change-id: 20231017-th1520-mmc-b7c72b7f56cd
Best regards,
--
Drew Fustini <dfustini@...libre.com>
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