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Message-ID: <20231023223059.4p7l474o5w3sdjuc@desk>
Date: Mon, 23 Oct 2023 15:30:59 -0700
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Josh Poimboeuf <jpoimboe@...nel.org>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
Peter Zijlstra <peterz@...radead.org>,
Andy Lutomirski <luto@...nel.org>,
Jonathan Corbet <corbet@....net>,
Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>, tony.luck@...el.com,
ak@...ux.intel.com, tim.c.chen@...ux.intel.com,
linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
kvm@...r.kernel.org,
Alyssa Milburn <alyssa.milburn@...ux.intel.com>,
Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
antonio.gomez.iglesias@...ux.intel.com,
Dave Hansen <dave.hansen@...el.com>
Subject: Re: [PATCH 2/6] x86/entry_64: Add VERW just before userspace
transition
On Mon, Oct 23, 2023 at 02:47:52PM -0700, Josh Poimboeuf wrote:
> > > > /*
> > > > * RSP now points to an ordinary IRET frame, except that the page
> > > > * is read-only and RSP[31:16] are preloaded with the userspace
> > > > @@ -1502,6 +1511,9 @@ nmi_restore:
> > > > std
> > > > movq $0, 5*8(%rsp) /* clear "NMI executing" */
> > > >
> > > > + /* Mitigate CPU data sampling attacks .e.g. MDS */
> > > > + USER_CLEAR_CPU_BUFFERS
> > > > +
> > > > /*
> > > > * iretq reads the "iret" frame and exits the NMI stack in a
> > > > * single instruction. We are returning to kernel mode, so this
> > >
> > > This isn't needed here. This is the NMI return-to-kernel path.
> >
> > Yes, the VERW here can be omitted. But probably need to check if an NMI
> > occuring between VERW and ring transition will still execute VERW after
> > the NMI.
>
> That window does exist, though I'm not sure it's worth worrying about.
I am in favor of omitting the VERW here, unless someone objects with a
rationale. IMO, precisely timing the NMIs in such a narrow window is
impractical.
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