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Message-ID: <20231023004100.2663486-12-peterlin@andestech.com>
Date: Mon, 23 Oct 2023 08:40:58 +0800
From: Yu Chien Peter Lin <peterlin@...estech.com>
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Subject: [RFC PATCH v3 RESEND 11/13] riscv: dts: allwinner: Add T-Head PMU extension
Based on the added T-Head PMU ISA string, the SBI PMU driver
will make use of the non-standard irq source.
Signed-off-by: Yu Chien Peter Lin <peterlin@...estech.com>
---
Changes v2 -> v3:
- New patch
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 947e975d2476..eaf70fa01dbf 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -27,7 +27,7 @@ cpu0: cpu@0 {
riscv,isa = "rv64imafdc";
riscv,isa-base = "rv64i";
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
- "zifencei", "zihpm";
+ "zifencei", "zihpm", "xtheadpmu";
#cooling-cells = <2>;
cpu0_intc: interrupt-controller {
--
2.34.1
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