linux-kernel - [RFC 01/12] riscv: Introduce CONFIG_RISCV_PSEUDO

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Date:   Mon, 23 Oct 2023 16:29:00 +0800
From:   Xu Lu <luxu.kernel@...edance.com>
To:     paul.walmsley@...ive.com, palmer@...belt.com,
        aou@...s.berkeley.edu, tglx@...utronix.de, maz@...nel.org,
        anup@...infault.org, atishp@...shpatra.org
Cc:     dengliang.1214@...edance.com, liyu.yukiteru@...edance.com,
        sunjiadong.lff@...edance.com, xieyongji@...edance.com,
        lihangjing@...edance.com, chaiwen.cc@...edance.com,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        Xu Lu <luxu.kernel@...edance.com>
Subject: [RFC 01/12] riscv: Introduce CONFIG_RISCV_PSEUDO_NMI

This commit introduces a new config RISCV_PSEUDO_NMI to control
whether enabling the pseudo NMI feature on RISC-V.

Signed-off-by: Xu Lu <luxu.kernel@...edance.com>
---
 arch/riscv/Kconfig | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index d607ab0f7c6d..487e4293f31e 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -669,6 +669,16 @@ config RISCV_BOOT_SPINWAIT
 
 	  If unsure what to do here, say N.
 
+config RISCV_PSEUDO_NMI
+	bool "Support for NMI-like interrupts"
+	depends on !RISCV_M_MODE
+	default n
+	help
+	  Adds support for mimicking Non-Maskable Interrupts through the use of
+	  CSR_IE register.
+
+	  If unsure, say N.
+
 config ARCH_SUPPORTS_KEXEC
 	def_bool MMU
 
-- 
2.20.1