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Date:   Mon, 23 Oct 2023 19:43:36 +0800
From:   Baolin Wang <baolin.wang@...ux.alibaba.com>
To:     Huangzheng Lai <Huangzheng.Lai@...soc.com>,
        Andi Shyti <andi.shyti@...nel.org>
Cc:     Orson Zhai <orsonzhai@...il.com>,
        Chunyan Zhang <zhang.lyra@...il.com>,
        linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
        huangzheng lai <laihuangzheng@...il.com>,
        Xiongpeng Wu <xiongpeng.wu@...soc.com>
Subject: Re: [PATCH V2 7/7] i2c: sprd: Add I2C_NACK_EN and I2C_TRANS_EN
 control bits



On 10/23/2023 4:11 PM, Huangzheng Lai wrote:
> The new I2C IP version on the UNISOC platform has added I2C_NACK_EN and
> I2C_TRANS_EN control bits. To ensure that the I2C controller can initiate
> transmission smoothly, these two bits need to be configured.

What is the side impact for old hardwares that does not support these 2 
bits?

> Signed-off-by: Huangzheng Lai <Huangzheng.Lai@...soc.com>
> ---
>   drivers/i2c/busses/i2c-sprd.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c
> index dbdac89ad482..431c0db84d22 100644
> --- a/drivers/i2c/busses/i2c-sprd.c
> +++ b/drivers/i2c/busses/i2c-sprd.c
> @@ -33,6 +33,8 @@
>   #define ADDR_RST		0x2c
>   
>   /* I2C_CTL */
> +#define I2C_NACK_EN		BIT(22)
> +#define I2C_TRANS_EN		BIT(21)
>   #define STP_EN			BIT(20)
>   #define FIFO_AF_LVL_MASK	GENMASK(19, 16)
>   #define FIFO_AF_LVL		16
> @@ -366,7 +368,7 @@ static void sprd_i2c_enable(struct sprd_i2c *i2c_dev)
>   	sprd_i2c_clear_irq(i2c_dev);
>   
>   	tmp = readl(i2c_dev->base + I2C_CTL);
> -	writel(tmp | I2C_EN | I2C_INT_EN, i2c_dev->base + I2C_CTL);
> +	writel(tmp | I2C_EN | I2C_INT_EN | I2C_NACK_EN | I2C_TRANS_EN, i2c_dev->base + I2C_CTL);
>   }
>   
>   static int sprd_i2c_master_xfer(struct i2c_adapter *i2c_adap,

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