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Message-ID: <CAA8EJprscPcr0pMM=fz4yGWsgprk7bAXCcbbZJQmdv0siKASow@mail.gmail.com>
Date:   Tue, 24 Oct 2023 22:59:12 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Mukesh Ojha <quic_mojha@...cinc.com>
Cc:     agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        p.zabel@...gutronix.de, linus.walleij@...aro.org,
        linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 1/3] firmware: qcom_scm: provide a read-modify-write function

On Wed, 4 Oct 2023 at 20:26, Mukesh Ojha <quic_mojha@...cinc.com> wrote:
>
> It was realized by Srinivas K. that there is a need of
> read-modify-write scm exported function so that it can
> be used by multiple clients.
>
> Let's introduce qcom_scm_io_update_field() which masks
> out the bits and write the passed value to that bit-offset.
>
> Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> Signed-off-by: Mukesh Ojha <quic_mojha@...cinc.com>
> Tested-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com> # IPQ9574 and IPQ5332
> ---
>  drivers/firmware/qcom_scm.c            | 20 ++++++++++++++++++++
>  include/linux/firmware/qcom/qcom_scm.h |  2 ++
>  2 files changed, 22 insertions(+)
>
> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
> index 520de9b5633a..084e4782b88d 100644
> --- a/drivers/firmware/qcom_scm.c
> +++ b/drivers/firmware/qcom_scm.c
> @@ -122,6 +122,7 @@ static const char * const qcom_scm_convention_names[] = {
>  };
>
>  static struct qcom_scm *__scm;
> +static DEFINE_SPINLOCK(lock);

Please move the spinlock inside __scm.

>
>  static int qcom_scm_clk_enable(void)
>  {
> @@ -481,6 +482,25 @@ static int qcom_scm_disable_sdi(void)
>         return ret ? : res.result[0];
>  }
>
> +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val)

qcom_scm_io_rmw ? qcom_scm_io_update_bits? These might be better names
and they follow the existing function names.

> +{
> +       unsigned int old, new;
> +       int ret;
> +
> +       spin_lock(&lock);
> +       ret = qcom_scm_io_readl(addr, &old);
> +       if (ret)
> +               goto unlock;
> +
> +       new = (old & ~mask) | (val & mask);
> +
> +       ret = qcom_scm_io_writel(addr, new);
> +unlock:
> +       spin_unlock(&lock);
> +       return ret;
> +}
> +EXPORT_SYMBOL_GPL(qcom_scm_io_update_field);
> +
>  static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
>  {
>         struct qcom_scm_desc desc = {
> diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
> index ccaf28846054..5497eaf9c7b5 100644
> --- a/include/linux/firmware/qcom/qcom_scm.h
> +++ b/include/linux/firmware/qcom/qcom_scm.h
> @@ -82,6 +82,8 @@ bool qcom_scm_pas_supported(u32 peripheral);
>
>  int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
>  int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
> +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask,
> +                            unsigned int val);
>
>  bool qcom_scm_restore_sec_cfg_available(void);
>  int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
> --
> 2.7.4
>


-- 
With best wishes
Dmitry

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