linux-kernel - Re: [PATCH net-next 4/5] net: ipqess: add a PSGMII calibration procedure to the IPQESS driver

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Message-ID: <4bde9110-c88d-4a22-8e67-e788db4673f3@lunn.ch>
Date:   Tue, 24 Oct 2023 16:13:30 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Romain Gantois <romain.gantois@...tlin.com>
Cc:     davem@...emloft.net, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Jakub Kicinski <kuba@...nel.org>,
        Eric Dumazet <edumazet@...gle.com>,
        Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        thomas.petazzoni@...tlin.com,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        linux-arm-kernel@...ts.infradead.org,
        Vladimir Oltean <vladimir.oltean@....com>,
        Luka Perkov <luka.perkov@...tura.hr>,
        Robert Marko <robert.marko@...tura.hr>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Maxime Chevallier <maxime.chevallier@...tlin.com>
Subject: Re: [PATCH net-next 4/5] net: ipqess: add a PSGMII calibration
 procedure to the IPQESS driver

> Yes, I'll add more detailed comments to the code in the v2. The calibration 
> procedure itself targets the PSGMII device, which is internal to the SoC and can 
> be logically accessed as a PHY device on the MDIO bus. This component is a 
> little opaque and has some nonstandard MII register definitions.
> 
> The "testing" phase that follows the calibration accesses both the internal 
> QCA8K switch ports and the external QCA8075 PHY. For example, it puts both the 
> switch ports and the PHY ports in loopback before starting packet generation on 
> the external PHYs. This is done to verify that the PSGMII link works correctly 
> after being calibrated.
> 
> So this code interacts with both internal ESS devices and external PHYs, but 
> mostly the former, which is why I kept everything in the MAC/switch driver.

Accessing the external PHYs i would suggest go over the normal phylib
API. Somebody might build a board using a different PHY, with
different registers. If all you need is loopback, there is a phylib
call for that.

Directly accessing the internal ESS is fine, it cannot be changed, but
if there are phylib helpers which do the same thing, consider using
them.

     Andrew